English
Language : 

CY62156ESL Datasheet, PDF (10/16 Pages) Cypress Semiconductor – 8-Mbit (512 K x 16) Static RAM
CY62156ESL MoBL®
Switching Waveforms (continued)
Figure 8. Write Cycle 3: WE controlled, OE LOW [24]
ADDRESS
CE1
tWC
tSCE
CE2
BHE/BLE
tBW
tAW
tHA
tSA
tPWE
WE
DATA I/O
ADDRESS
NOTE 25
tHZWE
tSD
VALID DATA
tHD
tLZWE
Figure 9. Write Cycle 4: BHE/BLE Controlled, OE LOW [24]
tWC
CE1
CE2
BHE/BLE
tSA
WE
DATA I/O
NOTE 25
tSCE
tAW
tBW
tPWE
tSD
VALID DATA
tHA
tHD
Notes
24. If CE1 goes HIGH and CE2 goes LOW simultaneously with WE = VIH, the output remains in a high impedance state.
25. During this period, the I/Os are in output state. Do not apply input signals.
Document Number: 001-54995 Rev. *D
Page 10 of 16