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STK12C68_11 Datasheet, PDF (1/24 Pages) Cypress Semiconductor – 64 Kbit (8K x 8) AutoStore nvSRAM 25 ns, 35 ns, and 45 ns access times
STK12C68
64 Kbit (8K x 8) AutoStore nvSRAM
Features
Functional Description
■ 25 ns, 35 ns, and 45 ns access times
The Cypress STK12C68 is a fast static RAM with a nonvolatile
■ Hands off automatic STORE on power down with external 68
µF capacitor
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
■ STORE to QuantumTrap nonvolatile elements is initiated by
software, hardware, or AutoStore on power down
■ RECALL to SRAM initiated by software or power up
unlimited read and write cycles, while independent nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
■ Unlimited Read, Write, and Recall cycles
power up, data is restored to the SRAM (the RECALL operation)
ly. ■ 1,000,000 STORE cycles to QuantumTrap
on ■ 100 year data retention to QuantumTrap
ms ■ Single 5V+10% operation
gra ■ Commercial and industrial temperatures
pro ■ 228-pin (330mil) SOIC, 28-pin (300mil) PDIP, 28-pin (600mil)
n PDIP packages
s. ctio ■ 28-pin (300 mil) CDIP and 28-pad (350 mil) LCC packages
ign odu ■ RoHS compliance
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control. A hardware
STORE is initiated with the HSB pin.
New nDgeosing pr Logic Block Diagram
ded foprport o A5
en su A6
m to A7
m n A8
eco tio A9
R uc A11
NoItn prod A12
Quantum Trap
128 X 512
STORE
STATIC RAM
ARRAY
128 X 512
RECALL
VCC
VCAP
POWER
CONTROL
STORE/
RECALL
CONTROL
HSB
SOFTWARE
DETECT
- A0 A12
DQ 0
COLUMN I/O
DQ 1
DQ 2
COLUMN DEC
DQ 3
DQ 4
DQ 5
A0 A1 A2 A3 A4 A10
DQ 6
DQ 7
OE
CE
WE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-51027 Rev. *C
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 7, 2011
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