CY7C68003_10 Datasheet, PDF (1/27 Pages) Cypress Semiconductor – MoBL-USB™ TX2UL USB 2.0 ULPI Transceiver

CY7C68003
MoBL-USB™ TX2UL USB 2.0
ULPI Transceiver
Features
The Cypress MoBL-USB™ TX2UL is a low voltage high speed
(HS) USB 2.0 UTMI+ Low Pin Interface (ULPI) Transceiver. The
TX2UL is specifically designed for mobile handset applications
by offering tiny package options and low power consumption.
■ USB 2.0 Full Speed and High Speed Compliant Transceiver
■ Multi Range (1.8V to 3.3V) I/O Voltages
■ Fully Compliant ULPI Link Interface
■ 8-bit SDR ULPI Data Path
■ UTMI+ Level 0 Support
■ Support USB Device Mode only
■ Integrated Oscillator
■ Integrated Phase Locked Loop (PLL) – 13, 19.2, 24, or 26 MHz
Reference
■ Integrated USB Pull Up and Termination Resistors
■ 3.0V to 5.775V VBATT Input
■ Chip Select Pin
■ Single Ended Device RESET Input
■ UART Pass Through Mode
■ ESD Compliance:
❐ JESD22-A114D 8 kV Contact Human Body Model (HBM) for
DP, DM, and VSS Pins
❐ IEC61000 - 4-2 8 kV Contact Discharge
❐ IEC61000 - 4-2 15 kV Air Discharge
■ Support for Industrial Temperature Range: (-40°C to 85°C)
■ Low Power Consumption for Mobile Applications:
❐ 5 uA Nominal Sleep Mode
❐ 30 mA Nominal Active HS Transfer
■ Small Package for Mobile Applications:
❐ 2.14 x 1.76 mm 20-pin WLCSP 0.4 mm Pitch
❐ 4 x 4 mm 24-pin QFN
Applications
■ Mobile Phones
■ PDAs
■ Portable Media Players (PMPs)
■ DTV Applications
■ Portable GPS Units
TX2UL Block Diagram
CLOCK
DATA[7:0]
DIR
STP
NXT
TX2UL
ULPI Block
IO
Control/
Data
Logic
Operational
mode
tracking
interrupt
Registers
Block
ULPI Wrapper
Tx/Rx
Core
UTMI+
Level0
DP
USB
FS/HS
PHY
DM
RESET_N
CS_N
(3.0 –
5.775V)
VBATT
VCC
(1.8V)
XI
13/19.2/
24/26 MHz
XO
Global Control Block
Reset / Clock / Power /
Misc. Control
POR
PLL
XOSC
RXD
TXD
3.3V Regulator
Block
1.8V
Bandgap
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-15775 Rev. *I
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 22, 2010
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