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CY7C6471314 Datasheet, PDF (1/50 Pages) Cypress Semiconductor – EZ-USB FX1™ USB Microcontroller Full-speed USB Peripheral Controller | |||
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CY7C64713/14
EZ-USB FX1⢠USB Microcontroller
Full-speed USB Peripheral Controller
1.0 Features
⢠Single-chip integrated USB transceiver, SIE, and
enhanced 8051 microprocessor
⢠Fit, form and function upgradable to the FX2LP
(CY7C68013A)
â Pin-compatible
â Object-code-compatible
â Functionally-compatible (FX1 functionality is a
Subset of the FX2LP)
⢠Draws no more than 65 mA in any mode making the FX1
suitable for bus powered applications
⢠Software: 8051 runs from internal RAM, which is:
â Downloaded via USB
â Loaded from EEPROM
â External memory device (128-pin configuration only)
⢠16 KBytes of on-chip Code/Data RAM
⢠Four programmable BULK/INTERRUPT/ISOCH-
RONOUS endpoints
â Buffering options: double, triple, and quad
⢠Additional programmable (BULK/INTERRUPT) 64-byte
endpoint
⢠8- or 16-bit external data interface
⢠Smart Media Standard ECC generation
⢠GPIF
â Allows direct connection to most parallel interfaces;
8- and 16-bit
â Programmable waveform descriptors and configu-
ration registers to define waveforms
â Supports multiple Ready (RDY) inputs and Control
(CTL) outputs
⢠Integrated, industry standard 8051 with enhanced
features
â Up to 48-MHz clock rate
â Four clocks per instruction cycle
â Two USARTS
â Three counter/timers
â Expanded interrupt system
â Two data pointers
⢠3.3V operation with 5V tolerant inputs
⢠Smart SIE
⢠Vectored USB interrupts
⢠Separate data buffers for the Setup and DATA portions
of a CONTROL transfer
⢠Integrated I2C controller, runs at 100 or 400 KHz
⢠48-MHz, 24-MHz, or 12-MHz 8051 operation
⢠Four integrated FIFOs
â Brings glue and FIFOs inside for lower system cost
â Automatic conversion to and from 16-bit buses
â Master or slave operation
â FIFOs can use externally supplied clock or
asynchronous strobes
â Easy interface to ASIC and DSP ICs
⢠Vectored for FIFO and GPIF interrupts
⢠Up to 40 general purpose I/Os
⢠Three package optionsâ128-pin TQFP, 100-pin TQFP,
and 56-pin QFN Lead-free
24 MHz
Ext. XTAL
High-performance micro
using standard tools
with lower-power options
FX1
/0.5
VCC x20 /1.0
PLL /2.0
1.5k
connected for
enumeration
D+
Dâ
Integrated
full-speed XCVR
USB
XCVR
CY
Smart
USB
Engine
8051 Core
12/24/48 MHz,
four clocks/cycle
16 KB
RAM
I2C
Master
Additional I/Os (24)
ECC
ADDR (9)
GPIF
RDY (6)
CTL (6)
Abundant I/O
including two USARTS
General
programmable I/F
to ASIC/DSP or bus
standards such as
ATAPI, EPP, etc.
4 kB
8/16
FIFO
Up to 96 MBytes/s
burst rate
Enhanced USB core
Simplifies 8051 code
âSoft Configurationâ
Easy firmware changes
FIFO and endpoint memory
(master or slave operation)
Figure 1-1. Block Diagram
Cypress Semiconductor Corporation
Document #: 38-08039 Rev. *B
⢠3901 North First Street
⢠San Jose, CA 95134 ⢠408-943-2600
Revised February 14, 2005
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