CY2CC910 Datasheet, PDF (1/8 Pages) Cypress Semiconductor – 1:10 Clock Fanout Buffer

COMLINK™ SERIES
CY2CC910
1:10 Clock Fanout Buffer
Features
• Low-voltage operation
• Full-range support:
— 3.3V
— 2.5V
— 1.8V
• Over voltage tolerant input hot swappable
• 1:10 fanout
• Drives either a 50-Ohm or 75-Ohm load
• Low-input capacitance
• Low-output skew
• Low-propagation delay
• Typical (tpd < 4 ns)
• High-speed operation:
— -200 MHz@1.8V
Block Diagram
3
5
7
VDD
4,8
9
15,20
11
IN ₁
INPUT
12
(AVCMOS)
2,6,10
14
13,17
— 650 MHz@2.5V/3.3V
• Industrial versions available
• Available packages include: SOIC, SSOP
Description
The Cypress series of network circuits are produced using
advanced 0.35 micron CMOS technology, achieving the indus-
tries fastest logic and buffers.
The Cypress CY2CC910 fanout buffer features one input and
ten outputs. Ideal for conversion from/to 3.3V/2.5V/1.8V
Designed for Data Communications clock management appli-
cations, the large fanout from a single input reduces loading
on the input clock.
Cypress employs unique AVCMOS type outputs VOI™
(Variable Output Impedance) that dynamically adjust for
variable impedance matching and eliminate the need for
series damping resistors and reduce noise overall.
Pin Configuration
Q1
IN 1
20 VDD
Q2
GND 2
19 Q10
Q1 ³
18 Q9
Q3
VDD ⁴
17 _GND
Q2 ⁵
16 Q8
Q4
GND ⁶
15 _VDD
Q3 ⁷
14 _Q7
Q5
VDD ⁸
13 GND
Q4 ⁹
12 _Q6
Q6
GND ¹⁰
11 _Q5
20 pin SOIC/SSOP
Q7
GND
16
Q8
18
Q9
19
Q10
OUTPUT
(AVCMOS)
Pin Description
Pin Number
1
2,6,10,13,17
4,8,15,20
3,5,7,9,11,12,14,16,18,19
Pin Name
IN
GND
V_DD
Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10
Description
Input
Ground
Power Supply
Output
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07348 Rev. *A
Revised October 3, 2002