CY2220 Datasheet, PDF (1/11 Pages) Cypress Semiconductor – 133-MHz Spread Spectrum Clock Synthesizer/Driver With Differential CPU Outputs

0
CY2220
133-MHz Spread Spectrum Clock Synthesizer/Driver
with Differential CPU Outputs
Features
Benefits
• Compliant to Intel^® CK00 Clock Synthesizer/Driver
Specifications
Supports next generation Pentium^® processors using differen-
tial clock drivers
• Multiple output clocks at different frequencies
Motherboard clock generator
— Four pairs of differential CPU outputs, up to 133 MHz — Support Multiple CPUs and a chipset
— Ten synchronous PCI clocks
— Support for PCI slots and chipset
— Two Memory Reference clocks, 180 degrees out of
phase
— Drives up to two Direct Rambus^™ Clock Generators
(DRCG)
— Four AGP and Hub Link clocks at 66 MHz
— Supports USB host controller and SuperI/O chip
— Two 48-MHz clocks
— Supports ISA slots and I/O chip
— Two reference clocks at 14.318 MHz
• Spread Spectrum clocking
Enables reduction of EMI and overall system cost
— 31 kHz modulation frequency
— Default is –0.6%, which is recommended by Intel
• Power-down features
Enables ACPI compliant designs
• Three Select inputs
Supports up to eight CPU clock frequencies
• Low-skew and low-jitter outputs
Meets tight system timing requirements at high frequency
• OE and Test Mode support
Enables ATE and “bed of nails” testing
• 56-pin SSOP package
Widely available, standard package enables lower cost
Logic Block Diagram
MultSel0
MultSel1
XTALIN
XTALOUT
SELA
SELB
SEL133
14.318
MHz
OSC.
SPREAD
PWR_DWN
CPU
PLL
EPROM
SYS
PLL
Divider
and
Stop Logic
Intel and Pentium are registered trademarks of Intel Corporation.
Direct Rambus is a trademark of Rambus, Inc.
Pin Configuration
SSOP
Top View
REFCLK [0–1]
V_SSREF
1
56
REFCLK0/MultSel_0 2
55
REFCLK1/MultSel_1 3
54
V_DDREF
4
53
CPUCLK [0–3]
XTALIN 5
52
XTALOUT 6
51
V_SSPCI
7
50
CPUCLKB [0–3]
MemRef, MemRefB
PCICLK_0 ₈
49
PCICLK_1 ₉
48
V_DDPCI
10
47
PCICLK_2 ₁₁
46
PCICLK_3 ₁₂
45
PCICLK [0–9] (33.33 MHz)
V_SSPCI 13
44
PCICLK_4 14
43
PCICLK_5 ¹⁵
42
V_DDPCI
16
41
3V66 [0–3] (66.67 MHz)
PCICLK_6 ¹⁷
40
PCICLK_7 18
39
V_SSPCI
19
38
USBCLK [0-1] (48 MHz)
PCICLK_8 ₂₀
37
PCICLK_9 ₂₁
36
V_DDPCI
22
35
Sel133 23
34
V_{SSUSB 24}
33
USBCLK0/SelA 25
32
USBCLK1/SelB ₂₆
31
V_DDUSB
27
30
PWR_DWN ₂₈
29
V_DDMEM
MemRef
MemRefB
V_SSMEM
SPREAD
CPUCLK_3
CPUCLK_3B
V_DDCPU
CPUCLK_2
CPUCLK_2B
V_SSCPU
CPUCLK_1
CPUCLK_1B
V_DDCPU
CPUCLK_0
CPUCLK_0B
V_SSCPU
I_REF
AV_DD
AV_SS
V_DD3V66
3V66_3
3V66_2
V_SS3V66
V_SS3V66
3V66_1
3V66_0
V_DD3V66
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07206 Rev. *A
Revised December 30, 2002