CY2213 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – High-Frequency Programmable PECL Clock Generator

1CY2213
Features
• Jitter peak-peak (TYPICAL) = 35 ps
• LVPECL output
• Default Select option
• Serially-configurable multiply ratios
• Output edge-rate control
• 16-pin TSSOP
• High frequency
• 3.3V operation
Block Diagram
CY2213
High-Frequency Programmable PECL
Clock Generator
Benefits
High-accuracy clock generation
One pair of differential output drivers
Phase-locked loop (PLL) multiplier select
Eight-bit feedback counter and six-bit reference counter for high accuracy
Minimize electromagnetic interference (EMI)
Industry-standard, low-cost package saves on board space
125- to 400-MHz (-1) or to 500-MHz (-2) extended output range for high-speed
applications
Enables application compatibility
XIN
XOUT
OE
S
SER CLK
SER DATA
Xtal
Oscillator
PLL
CLK
xM
CLKB
Pin Configuration
CY2213
16-pin TSSOP
VDDX ₁
VSSX ₂
XOUT ₃
XIN ₄
VDD ₅
OE ₆
VSS
7
SER CLK ₈
16 ^S
15 ^VDD
14 VSS
13 ^CLK
12 CLKB
11 VSS
10 VDD
9 SER DATA
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07263 Rev. *E
Revised May 23, 2003