CY14B256LA_11 Datasheet, PDF (1/22 Pages) Cypress Semiconductor – 256-Kbit (32 K × 8) nvSRAM

CY14B256LA
256-Kbit (32 K × 8) nvSRAM
256 Kbit (32K x 8) nvSRAM
Features
■ 25 ns and 45 ns access times
■ Internally organized as 32 K × 8 (CY14B256LA)
■ Hands off automatic STORE on power-down with only a small
capacitor
■ STORE to QuantumTrap nonvolatile elements initiated by
software, device pin, or AutoStore on power-down
■ RECALL to SRAM initiated by software or power-up
■ Infinite read, write, and recall cycles
■ 1 million STORE cycles to QuantumTrap
■ 20-year data retention
■ Single 3 V +20% to –10% operation
■ Industrial temperature
■ 44-pin thin small outline package (TSOP) - II, 48-pin shrunk
small outline package (SSOP), and 32-pin small-outline
integrated circuit (SOIC) packages
■ Pb-free and restriction of hazardous substances (RoHS)
compliance
Functional Description
The Cypress CY14B256LA is a fast static RAM, with a
nonvolatile element in each memory cell. The memory is
organized as 32 K bytes of 8 bits each. The embedded
nonvolatile elements incorporate QuantumTrap technology,
producing the world’s most reliable nonvolatile memory. The
SRAM provides infinite read and write cycles, while independent
nonvolatile data resides in the highly reliable QuantumTrap cell.
Data transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power-down. On
power-up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
Logic Block Diagram
A₅
A₆
A₇
A₈
A₉
A ₁₁
A ₁₂
A ₁₃
A ₁₄
DQ ₀
DQ ₁
DQ ₂
DQ ₃
DQ ₄
DQ ₅
DQ ₆
DQ ₇
Quantum Trap
512 X 512
STORE
STATIC RAM
ARRAY
512 X 512
RECALL
COLUMN I/O
COLUMN DEC
A₀ A₁ A₂ A₃ A₄ A₁₀
V_CC
V_CAP
POWER
CONTROL
STORE/
RECALL
CONTROL
HSB
SOFTWARE
DETECT
- A₁₃ A₀
OE
CE
WE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-54707 Rev. *F
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 20, 2011
[+] Feedback