CY14B108L_11 Datasheet, PDF (1/24 Pages) Cypress Semiconductor – 8-Mbit (1024 K × 8/512 K × 16) nvSRAM

CY14B108L
CY14B108N
8-Mbit (1024 K × 8/512 K × 16) nvSRAM
8 Mbit (1024K x 8/512K x 16) nvSRAM
Features
■ 20 ns, 25 ns, and 45 ns access times
■ Internally organized as 1024 K × 8 (CY14B108L) or 512 K ×16
(CY14B108N)
■ Hands off automatic STORE on power-down with only a small
capacitor
■ STORE to QuantumTrap nonvolatile elements initiated by
software, device pin, or AutoStore on power-down
■ RECALL to SRAM initiated by software or power-up
■ Infinite Read, Write, and RECALL cycles
■ 1 million STORE cycles to QuantumTrap
■ 20 year data retention
■ Single 3 V +20%, -10% operation
■ Industrial temperature
■ Packages
❐ 44-/54-pin thin small outline package (TSOP-II)
❐ 48-ball fine-pitch ball grid array (FBGA)
■ Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B108L/CY14B108N is a fast static RAM
(SRAM), with a nonvolatile element in each memory cell. The
memory is organized as 1024 Kbytes of 8 bits each or 512 K
words of 16 bits each. The embedded nonvolatile elements
incorporate QuantumTrap technology, producing the world’s
most reliable nonvolatile memory. The SRAM provides infinite
read and write cycles, while independent nonvolatile data
resides in the highly reliable QuantumTrap cell. Data transfers
from the SRAM to the nonvolatile elements (the STORE
operation) takes place automatically at power-down. On
power-up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
Logic Block Diagram^{[1, 2, 3]}
A₀
A₁
A₂
A₃
A₄
A₅
A₆
A₇
A₈
A₁₇
A₁₈
A₁₉
DQ₀
DQ₁
DQ₂
DQ₃
DQ₄
DQ₅
DQ₆
DQ₇
DQ₈
DQ₉
DQ₁₀
DQ₁₁
DQ₁₂
DQ₁₃
DQ₁₄
DQ₁₅
Quatrum Trap
2048 X 2048 X 2
V_CC
V_CAP
R
POWER
O
STORE
CONTROL
W
RECALL
D
E
STATIC RAM
C
ARRAY
STORE/RECALL
CONTROL
HSB
O
2048 X 2048 X 2
D
E
SOFTWARE
DETECT
A₁₄ - A₂
R
I
N
P
U
T
B
COLUMN I/O
U
F
F
E
R
COLUMN DEC
S
A₉ A₁₀ A₁₁ A₁₂ A₁₃ A₁₄ A₁₅ A₁₆
OE
WE
CE
BLE
BHE
Notes
1. Address A₀ - A₁₉ for ×8 configuration and Address A₀ - A₁₈ for ×16 configuration.
2. Data DQ₀ - DQ₇ for ×8 configuration and Data DQ₀ - DQ₁₅ for ×16 configuration.
3. BHE and BLE are applicable for ×16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-45523 Rev. *I
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 9, 2011
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