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CY14B108K_11 Datasheet, PDF (1/31 Pages) Cypress Semiconductor – 8 Mbit (1024 K x 8/512 K x 16) nvSRAM with Real Time Clock
CY14B108K, CY14B108M
8 Mbit (1024 K x 8/512 K x 16) nvSRAM
with Real Time Clock
Features
■ 25 ns and 45 ns access times
■ Internally organized as 1024 K × 8 (CY14B108K) or 512 K ×
16 (CY14B108M)
■ Hands off automatic STORE on power-down with only a small
capacitor
■ STORE to QuantumTrap nonvolatile elements is initiated by
software, device pin, or AutoStore on power-down
■ RECALL to SRAM initiated by software or power-up
■ High reliability
■ Infinite Read, Write, and RECALL cycles
■ 1 million STORE cycles to QuantumTrap
■ 20 year data retention
■ Single 3 V +20%, –10% operation
■ Data integrity of Cypress nonvolatile static RAM (nvSRAM)
combined with full-featured real time clock (RTC)
■ Watchdog timer
■ Clock alarm with programmable interrupts
■ Capacitor or battery backup for RTC
■ Industrial temperature
■ 44 and 54-pin thin small outline package (TSOP-II)
■ Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B108K/CY14B108M combines a 8-Mbit
nonvolatile static RAM (nvSRAM) with a full featured RTC in a
monolithic integrated circuit. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM is read and
written infinite number of times, while independent nonvolatile
data resides in the nonvolatile elements.
The RTC function provides an accurate clock with leap year
tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for periodic minutes, hours,
days, or months alarms. There is also a programmable watchdog
timer for process control.
Logic Block Diagram[1, 2, 3]
A0
R
A1
O
A2
W
A3
A4
D
A5
A6
A7
A8
A17
A18
E
C
O
D
E
R
A 19
DQ0
DQ1
DQ2
DQ3
DQ4
I
DQ5
N
P
DQ6
U
T
DQ7
B
U
DQ8
F
DQ9
F
DQ10
E
R
DQ11
S
DQ12
DQ13
DQ14
DQ15
Quatrum
Trap
2048 X 2048 X 2
STORE
RECALL
STATIC RAM
ARRAY
2048 X 2048 X 2
VCC
VCAP
POWER
CONTROL
STORE/RECALL
CONTROL
SOFTWARE
DETECT
VRTCbat
VRTCcap
HSB
A14 - A2
COLUMN I/O
COLUMN DEC
A9 A10 A11 A12 A13 A14 A15 A16
RTC
MUX
Xout
Xin
INT
A19- A0
OE
WE
CE
BLE
BHE
Notes
1. Address A0 - A19 for x8 configuration and Address A0 - A18 for x16 configuration.
2. Data DQ0 - DQ7 for x8 configuration and Data DQ0 - DQ15 for x16 configuration.
3. BHE and BLE are applicable for x16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-47378 Rev. *F
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 9, 2011
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