NQB-420DWA-AN Datasheet, PDF (26/36 Pages) CUI INC – FULLY REGULATED ADVANCED BUS CONVERTERS

CUI Inc │ SERIES: NQB-D │ DESCRIPTION: FULLY REGULATED ADVANCED BUS CONVERTERS
date 02/20/2013 │ page 26 of 36
PMBus Interface
This product provides a PMBus digital interface that
enables the user to configure many aspects of the device
operation as well as to monitor the input and output
voltages, output current and device temperature. The
product can be used with any standard two-wire I2C or
SMBus host device. In addition, the product is compatible
with PMBus version 1.2 and includes an SALERT line to
help mitigate bandwidth limitations related to continuous
fault monitoring. The product supports 100 kHz and 400
kHz bus clock frequency only. The PMBus signals, SCL,
SDA and SALERT require passive pull-up resistors as
stated in the SMBus Specification. Pull-up resistors are
required to guarantee the rise time as follows:
Eq. 7
τ = R_PC _p ≤ 1us
where Rp is the pull-up resistor value and Cp is the bus
load. The maximum allowed bus load is 400 pF. The pull-
up resistor should be tied to an external supply between
2.7 to 5.5 V, which should be present prior to or during
power-up. If the proper power supply is not available,
voltage dividers may be applied. Note that in this case, the
resistance in the equation above corresponds to parallel
connection of the resistors forming the voltage divider.
Schematic of connection of address resistors.
SA0/SA1 Index
0
1
2
3
4
5
6
7
R_SA0/R_SA1 [kΩ]
10
22
33
47
68
100
150
220
It is recommended to always use PEC (Packet Error Check)
when communicating via PMBus. For these products it is
a requirement to use PEC when using Send Byte to the
device, for example command “RESTORE_DEFAULT_ALL”.
The SA0 and SA1 pins can be configured with a resistor to
GND according to the following equation.
PMBus Address = 8 x (SA0value) + (SA1 value)
Monitoring via PMBus
A system controller (host device) can monitor a wide
variety of parameters through the PMBus interface. The
controller can monitor fault conditions by monitoring the
SALERT pin, which will be asserted when any number
of pre-configured fault or warning conditions occur. The
system controller can also continuously monitor any
number of power conversion parameters including but not
limited to the following:
If the calculated PMBus address is 0, 11 or 12, PMBus
address 127 is assigned instead. From a system point of
view, the user shall also be aware of further limitations of
the addresses as stated in the PMBus Specification. It is
not recommended to keep the SA0 and SA1 pins left open.
I²C/SMBus - Timing
•
Input voltage
•
Output voltage
•
Output current
•
Internal junction temperature
•
Switching frequency (Monitors the set value not
actual frequency)
•
Duty cycle
Setup and hold times timing diagram
Software Tools for Design and Production
For these products CUI provides software for configuring
and monitoring via the PMBus interface.
For more information please contact your local
CUI sales representative.
PMBus Addressing
The following figure and table show recommended resistor
values with min and max voltage range for hard-wiring
PMBus addresses (series E12, 1% tolerance resistors
suggested):
The setup time, tset, is the time data, SDA, must be stable
before the rising edge of the clock signal, SCL. The hold
time thold, is the time data, SDA, must be stable after
the rising edge of the clock signal, SCL. If these times are
violated incorrect data may be captured or meta-stability
may occur and the bus communication may fail. When
configuring the product, all standard SMBus protocols
must be followed, including clock stretching. Additionally,
a bus-free time delay between every SMBus transmission
(between every stop & start condition) must occur. Refer
to the SMBus specification, for SMBus electrical and timing
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