CY7C1059DV33_07 Datasheet, PDF (4/9 Pages) Cypress Semiconductor – 8-Mbit (1M x 8) Static RAM

CY7C1059DV33
AC Test Loads and Waveforms
AC characteristics (except High-Z) are tested using the load conditions shown in Figure 2 (a). High-Z characteristics are tested for all
speeds using the test load shown in Figure 2 (c).
Figure 2. AC Test Loads and Waveforms
OUTPUT
Z = 50Ω
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
50Ω
1.5V
(a)
30 pF*
High-Z characteristics:
3.3V
R 317Ω
OUTPUT
5 pF
R2
351Ω
3.0V
GND
ALL INPUT PULSES
90%
90%
10%
10%
Rise Time: 1 V/ns
(b)
Fall Time: 1 V/ns
(c)
Data Retention Characteristics
Over the Operating Range
Parameter
Description
Conditions^[4]
V_DR
I_CCDR
t_CDR[3]
t_R[5]
V_CC for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
V_CC = V_DR = 2.0V, _{CE > VCC – 0.3V,}
V_IN > V_CC – 0.3V or V_IN < 0.3V
Min
Max
Unit
2.0
V
20
mA
0
ns
t_RC
ns
Data Retention Waveform
DATA RETENTION MODE
V_CC
3.0V
V_DR > 2V
3.0V
t_CDR
t_R
CE
Notes
4. No inputs may exceed V_CC + 0.3V.
5. Full device operation requires linear V_CC ramp from V_DR to V_CC(min) > 50 μs or stable at V_CC(min) > 50 μs.
Document #: 001-00061 Rev. *C
Page 4 of 9
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