CN7221 Datasheet, PDF (4/18 Pages) Conexant Systems, Inc – Home Networking Physical Layer Device with Integrated Analog Front End Circuitry

LANfinity™ CN7221
Functional Description
Home Networking PHY with Integrated AFE
CN7221 Home Networking PHY with
Integrated AFE
7-Wire Serial Interface
(7WS)
Physical Layer Data
Processing
RS7112
Bus Interface
Interrupt Processing
Serial Peripheral Interface
(SPI)
Registers
EPROM
Interface
Analog Front End
Circuitry
RJ-11
EEPROM
Figure 2. CN7221 Device Block Diagram
LAN-056_CN7221_f2
Overview
The CN7221 PHY + AFE resides between the RS7112 and
the physical medium and is responsible for receiving and
transmitting data on that physical medium, detecting
collisions on the physical medium, and translating data to
and from the RS7112. For the purpose of this discussion,
the interface to the RS7112 is referred to as the back end.
The discussion of the back end briefly describes the
signals involved in that interface as well as some of the
operation of those signals. More detailed information may
be gathered from the section of this document on the 7-
wire serial interface itself (page 5).
Back End (PHY to MAC Interface)
The back end interface is wholly defined by the seven
following signals: HLAN_TX_CLK, HLAN_TX_EN,
HLAN_TXD, HLAN_RX_CLK, HLAN_CRS, HLAN_RXD, and
HLAN_COL. The Tx signals are sampled on the falling edge
of HLAN_TX_CLK and the Rx signals are changed on the
falling edge of the HLAN_RX_CLK. HLAN_COL may change
on either edge of either the HLAN_TX_CLK or the
HLAN_RX_CLK. All signals are active high.
Due to the nature of the encoding/decoding algorithm as
well as the collision detection algorithm used in the
CN7221, the resulting variable bit rate forces the PHY to
“hold off” the MAC data stream by gating the
HLAN_RX_CLK and HLAN_TX_CLK signals. Gating is done
in a manner guaranteed to be glitch-free.
4
Conexant
LAN-056, Rev. A
PROPRIETARY INFORMATION