CMX971 Datasheet, PDF (9/25 Pages) CML Microcircuits – Small 16-lead VQFN Package

Quadrature Modulator
CMX971
6 C-BUS Interface and Register Description
The C-BUS serial interface supports the transfer of control and status information between the CMX971’s
internal registers and an external host. Each C-BUS transaction consists of the host sending a single
Register Address byte, which may then be followed by zero or one data byte that is written into the
corresponding CMX971 register, as illustrated in Figure 5.
Data sent from the host on the Command Data (CDATA) line is clocked into the CMX971 on the rising
edge of the Serial Clock (SCLK) input. The C-BUS interface is compatible with common µC/DSP serial
interfaces and may also be easily implemented with general purpose I/O pins controlled by a simple
software routine. Section 9.1.3.4 gives the detailed C-BUS timing requirements.
Whether a C-BUS register is of read or write type is fixed for a given C-BUS register address, thus one
cannot both read and write the same C-BUS register address.
In order to provide ease of addressing when using this device with other CML RF devices the C-BUS
addresses below are arranged so as not to overlap those used on the existing CML RF Devices. Thus, a
common chip select (CSN) signal can be used, as well as common CDATA, RDATA and SCLK signals.
Also note that the General Reset ($1A) command on the CMX971 differs from other CML devices (such as
CMX991 / CMX992 / CMX993 / CMX998), which use $01 or $10 for this General Reset function.
The C-BUS functions can be disabled in the CMX971 by using the CBUSOFFN pin, see section 3 for
details. The CBUSOFFN pin should be tied high to enable C-BUS operation.
The following C-BUS register addresses are used:
Write Only register;
General Reset Register (Address only, no data)
General Control Register, 8-bit write only.
Control Register, 8-bit write only.
Address $1A
Address $1B
Address $1E
Read Only register;
General Control Register, 8-bit read only.
Control Register, 8-bit read only.
Address $EB
Address $EE
Notes:
 All registers will retain data if the VDD pin is held high, even if all other power supply pins are
disconnected.
 If clock and data lines are shared with other devices, the VDD pin must be maintained in its normal
operating range otherwise ESD protection diodes may cause a problem with loading signals
connected to SCLK, RDATA and CDATA pins, preventing correct programming of other devices.
Other supplies may be turned off and all circuits on the device may be powered down without
causing this problem.
 2015 CML Microsystems Plc
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D/971/4