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CPC7591 Datasheet, PDF (5/19 Pages) Clare, Inc. – Line Card Access Switch
1.6 Switch Specifications
1.6.1 Break Switches, SW1 and SW2
Parameter
Off-State
Leakage Current
On Resistance
On Resistance
Matching
DC current limit
Dynamic current limit
(t ≤ 0.5 μs)
Logic input to switch
output isolation
dv/dt sensitivity
Test Conditions
VSW1 (differential) = TLINE to TBAT
VSW2 (differential) = RLINE to RBAT
All-Off state.
+25° C,
VSW (differential) = -320 V to gnd
VSW (differential) = +260 V to -60 V
+85° C,
VSW (differential) = -330 V to gnd
VSW (differential) = +270 V to -60 V
-40° C,
VSW (differential) = -310 V to gnd
VSW (differential) = +250 V to -60 V
ISW(on) = ±10 mA, ±40 mA,
RBAT and TBAT = -2 V
+25° C
+85° C
-40° C
Per SW1 & SW2 On Resistance test
conditions.
VSW(on) = ±10V
+25° C
+85° C
-40° C
Break switches on, all other switches
off. Apply ±1 kV 10x1000 μs pulse with
appropriate protection in place.
Logic Inputs = GND
+25° C, VSW (TLINE, RLINE) = ±320 V
+85° C, VSW (TLINE, RLINE) = ±330 V
-40° C, VSW (TLINE, RLINE) = ±310 V
100VPP Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
Symbol
ISW
RON
ΔRON
ISW
ISW
ISW
-
Minimum
-
-
-
-
80
-
-
-
-
-
-
Typical
0.1
0.3
0.1
14.5
20.5
10.5
0.15
300
160
400
2.5
0.1
0.3
0.1
500
CPC7591
Maximum
Unit
1
μA
-
28
Ω
-
0.8
Ω
-
mA
425
-
A
1
μA
-
V/μs
R05
www.clare.com
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