CPC7583 Datasheet, PDF (11/16 Pages) Clare, Inc. – Line Card Access Switch

CPC7583
Functional Description
Introduction
The CPC7583 has eight distinct states. Please consult the
truth tables in table 12 and 13 for version differences.
• Idle/talk state (line break switches SW1, and SW2
closed). All other switches open.
• Ringing state, (ringing switches SW3, SW4 closed).
All other switches open.
• Loop access (loop access switches SW5, SW6
closed). All other switches open.
• Ring generator test state (SW7, SW8 closed). All
other switches open.
• SLIC test state Testin switches closed (SW9, SW10).
• Simultaneous Loop and SLIC access state. (SW9,
SW10, SW5 and SW6 closed). All other switches open.
• Simultaneous test out and ring test (SW5, SW6,
SW7, SW8 closed). All other switches open on the “BC”
abd “BD” version.
• All Off state (all switches open).
The CPC7583 offers break-before-make and make-before-
break switching with simple logic level input control. Solid
state switch construction means no impulse noise is gen-
erated when switching during ring cadence or ring trip, thus
eliminating the need for external “zero cross” switching cir-
cuitry. State control is via logic level input so no additional
driver circuitry is required. The line break switches SW1
and SW2 are linear switches that have exceptionally low
RDS_ON and excellent matching characteristics. The ring-
ing access switch SW4 has a breakdown voltage rating of
>480V which is sufficiently high, with proper protection, to
prevent breakdown in the presence of a transient fault con-
dition. (i.e., passing the transient on to the ring generator)
Integrated into the CPC7583 is a diode bridge clamping
circuit, current limiting and thermal shutdown mechanism
to provide protection to the SLIC device during a fault con-
dition. Positive and negative surges are reduced by the
current limiting circuitry and steered to ground via diodes.
Power cross transients are also reduced by the current lim-
iting and thermal shutdown circuits.
To protect the CPC7583 from an overvoltage fault condi-
tion, use of a secondary protector is required. The sec-
ondary protector must limit the voltage seen at the tip and
ring terminals to a level below the max breakdown volt-
age of the switches. To minimize the stress on the solid-
state contacts, use of a foldback or crowbar type sec-
ondary protector is recommended. With proper selection
of the secondary protector, a line card using the CPC7583
will meet all relevant ITU, LSSGR, FCC or UL protection
requirements.
The CPC7583 operates from a +5V supply only. This gives
the device extremely low idle and active power dissipation
and allows use with virtually any range of battery voltage.
A battery voltage is also used by the CP7583 as a refer-
ence for the integrated protection circuit. In the event of a
loss of battery voltage, the CPC7583 will enter an “all off”
state.
Switch Timing
The CPC7583 provides, when switching from the ringing
state to the idle/talk state, the ability to control the timing
when the ringing access switches SW3 and SW4 are re-
leased relative to the state of the line break switches SW1
and SW2 using simple logic level input. This is referred to
as a “make before break” or “break before make” opera-
tion. When the line break switch contacts (SW1, SW2) are
closed (or made) before the ringing access switch contact
(SW3, SW4) is opened (or broken), this is referred to a
‘make-before-break’ operation. Break-before-make opera-
tion occurs when the ringing access contact (SW3, SW4)
is opened (broken) before the line break switch contacts
(SW1, SW2) are closed (made). With the CPC7583 the
“make before break” and “break before make” operations
can easily be selected by applying logic level inputs to
INTESTout, INRING and INTESTin of the device.
The logic sequences for either mode of operation are given
in Tables 9 and 10. Logic states and explanations are given
in Tables 12 and 13.
Break-before make operation can also be achieved using
pin 13 (TSD) as an input. In table 10 lines 2 and 3 it is
possible to induce the switches to “all off” by grounding pin
13 (TSD) instead of apply logic input to the pins. This has
the effect of overriding the logic inputs and forcing the de-
vice to the “all off” state. Hold this input state for 25ms.
During this hold period, toggle the inputs from the ringing
state to the idle/talk state. After the 25ms release pin 13
(TSD) to return the switch control to the input INTESTout, INRING,
INTESTin and reset the device to the idle/talk state.
Setting pin 13 (TSD) to +5V will allow switch control using
the logic inputs. This setting, however, will also disable the
thermal shutdown circuit and is therefore not recommended.
When using logic controls via the input pins (INTESTout, INRING
and INTESTin), pin 13 (TSD) should be allowed to float. As a
result the two recommended states when using pin 13
Rev. E
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