CS4362A_09 Datasheet, PDF (7/50 Pages) Cirrus Logic – 114 dB, 192 kHz 6-Channel D/A Converter

CS4362A
Pin Name
#
Pin Description
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage. VQ must be
capacitively coupled to analog ground, as shown in the Typical Connection Diagram. The nom-
inal voltage level is specified in the Analog Characteristics and Specifications section. VQ pre-
VQ
21 sents an appreciable source impedance and any current drawn from this pin will alter device
performance. However, VQ can be used to bias the analog circuitry assuming there is no AC
signal component and the DC current is less then the maximum specified in the Analog Charac-
teristics and Specifications section.
FILT+
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling cir-
20 cuits. Requires the capacitive decoupling to analog ground as shown in the Typical Connection
Diagram.
AOUTA1 +,-
AOUTB1 +,-
AOUTA2 +,-
AOUTB2 +,-
AOUTA3 +,-
AOUTB3 +,-
39,40
38,37
35,36 Differential Analog Output (Output) - The full-scale differential analog output level is specified
34,33 in the Analog Characteristics specification table.
29,30
28,27
MUTEC1
MUTEC2
MUTEC3
MUTEC4
MUTEC5
MUTEC6
41
26 Mute Control (Output) - These pins are intended to be used as a control for external mute cir-
25 cuits on the line outputs to prevent the clicks and pops that can occur in any single supply sys-
24 tem. Use of Mute Control is not mandatory but recommended for designs requiring the absolute
23 minimum in extraneous clicks and pops.
22
Hardware Mode Definitions
M0
M2
M3
17
16 Mode Selection (Input) - Determines the operational mode of the device as detailed in Table 6
15 and Table 7.
42
Software Mode Definitions
SCL/CCLK
Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external
15 _{pull-up resistor to the logic interface voltage in I²C}^® _{Mode as shown in the Typical Connection}
Diagram.
SDA/CDIN
Serial Control Port Data (Input/Output) - SDA is a data I/O line in I²C Mode and is open drain,
16 requiring an external pull-up resistor to the logic interface voltage, as shown in the Typical Con-
nection Diagram; CDIN is the input data line for the control port interface in SPI™ mode.
AD0/CS
17
Address Bit 0 (C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C
Mode; CS is the chip select signal for SPI mode.
DSD Definitions
DSDA1
DSDB1
DSDA2
DSDB2
DSDA3
DSDB3
3
2
1
48
Direct Stream Digital Input (Input) - Input for Direct Stream Digital serial audio data.
47
46
DSD_SCLK
42 DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital serial audio interface.
DSD_EN
7
DSD Enable (Input) - When held at logic ‘1’, the device will enter DSD Mode (Stand-Alone Mode
only).
DS617F2
7