CS4205 Datasheet, PDF (58/80 Pages) Cirrus Logic – CrystalClear Audio Codec 97 with Portable Computing

CS4205
9. EXCLUSIVE FUNCTIONS
Some of the digital pins on the CS4205 have mul-
tiplexed functionality. These functions are mutual-
ly exclusive and cannot be requested at the same
time. The following pairs of functions are mutually
exclusive:
• GPIO and Serial Data Port (GPIO0 pin is
shared with LRCLK pin, GPIO1 pin is shared
with SDOUT pin, and GPIO[4:2] pins are
shared with SDI[3:1] pins)
• EAPD and Serial Data Port Serial Clock
(EAPD pin is shared with SCLK pin)
• S/PDIF and Second Serial Data Port (SPDO pin
is shared with SDO2 pin)
Use of the GPIO0/LRCLK, GPIO1/SDOUT, and
GPIO[4:2]/SDI[3:1] pins for serial data port has
priority over their GPIO functionality. There is no
priority assigned to the other two exclusive func-
tions. A function currently in use must be disabled
or powered down before the corresponding exclu-
sive function can be enabled. The following control
bits for these functions will behave differently than
normal bits: the EAPD bit in the Powerdown Con-
trol/Status Register (Index 26h), the GC[4:0] bits in
the GPIO Pin Config Register (Index 4Ch), the
SPEN bit in the S/PDIF Control Register
(Index 68h), and the SDI[3:1], SDO2, and SDSC
bits in the Serial Port Control Register
(Index 6Ah). These bits can become read-only bits
if they control a feature that is currently unavailable
because the corresponding exclusive feature is al-
ready in use, or the corresponding master control
for this feature is not set.
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