WM8325 Datasheet, PDF (5/254 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem

Production Data
WM8325
14.1 GENERAL DESCRIPTION ............................................................................... 50
14.2 ICE AND OTP MEMORY DEFINITION ............................................................ 50
14.3 BOOTSTRAP (START-UP) FUNCTION........................................................... 51
14.3.1 START-UP FROM OTP MEMORY ...................................................................................... 51
14.3.2 START-UP FROM ICE MEMORY (DEVELOPMENT MODE)..............................................52
14.3.3 START-UP FROM DCRW REGISTER SETTINGS ............................................................. 52
14.3.4 EXTERNAL ICE MEMORY CONNECTION ......................................................................... 52
14.4 OTP / ICE MEMORY CONTROL...................................................................... 53
14.4.1 ENTERING / EXITING THE PROGRAM STATE ................................................................. 54
14.4.2 OTP / ICE READ COMMAND .............................................................................................. 54
14.4.3 OTP WRITE COMMAND ..................................................................................................... 55
14.4.4 OTP VERIFY COMMAND .................................................................................................... 55
14.4.5 OTP FINALISE COMMAND ................................................................................................. 56
14.4.6 OTP CONTROL REGISTER ................................................................................................ 56
14.5 OTP / ICE INTERRUPTS ................................................................................. 58
14.6 DCRW MEMORY CONTENTS......................................................................... 58
14.6.1 DCRW PAGE 0 .................................................................................................................... 58
14.6.2 DCRW PAGE 1 .................................................................................................................... 59
14.6.3 DCRW PAGE 2 .................................................................................................................... 59
14.6.4 DCRW PAGE 3 .................................................................................................................... 60
14.6.5 DCRW PAGE 4 .................................................................................................................... 62
15 POWER MANAGEMENT ............................................................................ 63
15.1 GENERAL DESCRIPTION ............................................................................... 63
15.2 DC-DC CONVERTER AND LDO REGULATOR ENABLE ............................... 63
15.3 TIMESLOT CONTROL AND HARDWARE ENABLE (GPIO) CONTROL......... 64
15.4 OPERATING MODE CONTROL ...................................................................... 65
15.4.1 DC-DC SYNCHRONOUS BUCK CONVERTERS ................................................................ 65
15.4.2 LDO REGULATORS ............................................................................................................ 65
15.5 OUTPUT VOLTAGE CONTROL ...................................................................... 65
15.5.1 DC-DC SYNCHRONOUS BUCK CONVERTERS ................................................................ 65
15.5.2 LDO REGULATORS 1-10 .................................................................................................... 66
15.5.3 LDO REGULATOR 11..........................................................................................................66
15.6 DC-DC SYNCHRONOUS BUCK CONVERTER CONTROL ............................ 66
15.6.1 DC-DC3 / DC-DC4 DUAL MODE ......................................................................................... 67
15.7 LDO REGULATOR CONTROL ........................................................................ 68
15.8 HARDWARE CONTROL (GPIO) ...................................................................... 68
15.9 FAULT PROTECTION...................................................................................... 69
15.10 MONITORING AND FAULT REPORTING ....................................................... 69
15.11 POWER MANAGEMENT REGISTER DEFINITIONS ...................................... 70
15.11.1 DC-DC CONVERTER AND LDO REGULATOR ENABLE ................................................... 70
15.11.2 DC-DC SYNCHRONOUS BUCK CONVERTER CONTROL................................................ 70
15.11.3 LDO REGULATOR CONTROL ............................................................................................ 77
15.11.4 EXTERNAL POWER ENABLE (EPE) CONTROL................................................................ 86
15.11.5 MONITORING AND FAULT REPORTING........................................................................... 87
15.12 POWER MANAGEMENT INTERRUPTS ......................................................... 87
15.13 POWER GOOD INDICATION .......................................................................... 88
15.14 DC-DC SYNCHRONOUS BUCK CONVERTER OPERATION ........................ 90
15.14.1 OVERVIEW .......................................................................................................................... 90
15.14.2 DC-DC SYNCHRONOUS BUCK CONVERTERS ................................................................ 90
15.15 LDO REGULATOR OPERATION ..................................................................... 94
15.15.1 OVERVIEW .......................................................................................................................... 94
15.15.2 LDO REGULATORS ............................................................................................................ 95
16 RESERVED ................................................................................................. 96
17 POWER SUPPLY CONTROL ..................................................................... 97
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PD, February 2012, Rev 4.0
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