CDB4391A Datasheet, PDF (5/24 Pages) Cirrus Logic – Evaluation Board for CS4391A

CDB4391A
4. CS8414 DATA FORMAT
The CS8414 data format can be set with switches M0, M1, M2, and M3, as described in the CS8414 data
sheet. The format selected must be compatible with the data format of the CS4391A, as shown in the
CS4391A data sheet. Please note that the CS8414 does not support all the possible modes of the CS4391A
and the Left-Justified Format for the CS8414 and the CS4391A have incompatible serial clocks, see
Table 1. The default settings for M0-M3 on the evaluation board are given in Tables 3-4.
CS4391A CP
Mode Format
0
1
2
3
4
5
CS4391A SA
Mode Format
0
1
2
3
-
-
CS8414
Format
Unsupported
2
5
Unsupported
Unsupported
6
Table 1. CS8414 Supported Formats
5. INPUT/OUTPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow interfacing to external systems via the 10-pin header, J9.
This header allows the evaluation board to accept externally generated clocks and data. The schematic for
the clock/data I/O is shown in Figure 9. The 74HC243 transceiver functions as an I/O buffer where HRD1
through HRD6 determine if the transceiver operates as a transmitter or receiver. A transmit function is im-
plemented with all jumpers, HRD1 through HDR6 in the 8414 position. LRCK, SDATA, and SCLK from
the CS8414 will be outputs on J9. The transceiver operates as a receiver with HRD1 through HDR6 in the
EXT_CLK position. MCLK, LRCK, SDATA and SCLK on J9 become inputs.
6. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by six binding posts (GND, +5V(J6), +5V(J1), VL, VCC and
VEE), see Figure 10. The +5V(J6) input supplies power to the +5 volt digital circuitry (V+5, VD+5, VD-
PC+5), while the VL input supplies power to the Voltage Level Converters and the CS4391A VL pin.
+5V(J1) supplies power to the CS4391A. VCC and VEE supply power to the op-amp and can be +/-9 to
+/-12 volts.
WARNING: Refer to the CS4391A data sheet for maximum allowable voltages levels. Operation outside
of this range can cause permanent damage to the device.
7. GROUNDING AND POWER SUPPLY DECOUPLING
The CS4391A requires careful attention to power supply and grounding arrangements to optimize perfor-
mance. Figure 10 details the power distribution used on this board. The decoupling capacitors are located
as close to the CS4391A as possible. Extensive use of ground plane fill in the evaluation board yields large
reductions in radiated noise.
DS600DB1
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