CS4216 Datasheet, PDF (49/58 Pages) Cirrus Logic – 16-Bit Stereo Audio Codec

CDB4216
VD
14
C2
0.1 uF
11.2896 MHz ₈
7
Oscillator
Module
J1
INT
EXT
VD
R5
47.5k
CS4216
1
4
35
6
R8 ₃
CLKIN
CLKIN
2
10
U11B
R7
R6 ^U11A
5k
47.5k
74HC132
Figure 7. Default Clock Circuit
nal source. To select the CLKIN BNC, the J1
jumper must be placed in the EXT position.
When the J1 jumper is in the INT position, the
on-board oscillator is used as the master clock.
Both clock sources are buffered to guarantee a
clean signal and proper clock levels to the codec.
If sample frequencies other than the ones pro-
vided are needed, the oscillator can be replaced
with the proper frequency oscillator. The board
accepts crystals and provides the socket Y1 (refer
to Figure 8). When using a crystal, U8 must con-
tain an HCU04 unbuffered CMOS inverter. The
U8 socket is designed to accept either the
HCU04 or a crystal oscillator, and can alternate
between the two.
LAYOUT ISSUES
Figure 11 contains the silk screen, Figure 12
contains the component-side copper layer, and
Figure 13 contains the solder-side copper layer
of the CDB4216/8 evaluation board. These plots
are included to provide an example of how to
correctly layout a PCB for the codec.
Grounding and Power
C2
0.1uF
C44
33 pF
Y1
R55
C43
33 pF
VD
10M
13
12
11
10
9
8
CLKIN-J1
14
U8
74HCUO4
7
1
2
3
4
5
6
Figure 8. Optional Clock Circuit
DS83DB4
49