CL-PS7500FE Datasheet, PDF (49/251 Pages) Cirrus Logic – System-on-a Chip for Internet Appliance

CL-PS7500FE
System-on-a-Chip for Internet Appliance
6.9 Domain Access Control
MMU accesses are primarily controlled through domains. There are 16 domains, and each has a 2-bit
field to define it. Two basic kinds of users are supported:
q Clients use a domain, and
q Managers control the behavior of the domain.
The domains are defined in the Domain Access Control register. Figure 6-9 illustrates how the 32 bits of
the register are allocated to define the sixteen 2-bit domains.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Figure 6-9. Domain Access Control Register Format
Table 6-5 defines how the bits within each domain are interpreted to specify the access permissions.
Table 6-5. Interpreting Access Bits in Domain Access Control Register
Value Meaning
Notes
00 No access Any access generates a Domain fault.
01 Client
Accesses are checked against the access permission bits in the Section or Page descriptor.
10 Reserved Reserved. Currently behaves like the No Access mode.
11
Manager
Accesses are not checked against the access Permission bits, so a Permission fault cannot be gen-
erated.
6.10 Fault-Checking Sequence
The sequence used by the MMU to check for access faults is slightly different for Sections and Pages.
Figure 6-9 illustrates the sequence for both types of accesses. The following sections and figures describe
the conditions that generate each of the faults.
48
ARM PROCESSOR MMU
ADVANCE DATA BOOK v2.0
June 1997