CL-PS7500FE Datasheet, PDF (141/251 Pages) Cirrus Logic – System-on-a Chip for Internet Appliance

CL-PS7500FE
System-on-a-Chip for Internet Appliance
16. THE VIDEO SOUND AND PROGRAMMER’S MODEL
16.1 The Video and Sound Macrocell Registers
The video and sound macrocell contains 296 write-only registers. These are split into 2 categories: the
256 28-bit video palette entries, and the remaining control registers. The video palette entries are written
through an auto-incrementing address pointer. All the other registers (including the 28-bit cursor palette)
are written directly with the address encoded in the top 4 or 8 bits of the data word. To program the reg-
isters, set the CL-PS7500FE address bus to between 0x03400000 and 0x034FFFFF and the data word
written should include the individual register address in the upper 4 or 8 bits, as appropriate.
To define the display format correctly, eleven registers must be programmed as shown in Figure 16-1.
BORDER
DISPLAY
CURSOR
VSWR
HSYNC
HBSR
HDSR
HCSR
HCR
HBER
HDER
HORIZONTAL BACK PORCH
HSWR
HORIZONTAL FRONT PORCH
Figure 16-1. The Video and Sound Macrocell Display Format Definitions
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THE VIDEO SOUND AND PROGRAMMER’S MODEL
ADVANCE DATA BOOK v2.0
June 1997