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CS62180 Datasheet, PDF (36/50 Pages) Cirrus Logic – T1 FRAMER
CS62180B
Power Supply Connections
VDD - Positive Supply, Pin 40 (PLCC, Pin 44).
Positive digital power supply. Nominally +5.0 Volts.VDD current requirements increase if
RCLK is static, and if RST is held high.
VSS - Signal Ground, Pin 20 (PLCC, Pin 22).
Power supply ground. Nominally 0 volts.
Host Mode Serial Interface
Pins 14 - 18 (PLCC, 16 - 20) are multifunctional. When in Host mode, they operate as serial
interface pins. When in hardware mode, they are redefined as mode control pins. Their hard-
ware mode operation is described separately under Hardware Mode Control Pins, below.
SPS - Serial Port Select, Pin 19 (PLCC, Pin 21).
Must be tied to VDD to select host mode, allowing operation of serial port. Tying SPS to VSS
selects hardware mode. Selecting hardware mode clears all internal registers except the com-
mon control register (CCR) and transmitter control register (TCR), and redefines pins 14
through 18 (PLCC, 16 - 20) as mode control pins.
Inputs
SDI - Serial Data In, Pin 15 (PLCC, Pin 17).
Serial data input for addressing and writing to on-board control registers. Data is input LSB
first. Input data is latched on the rising edge of SCLK.
CS - Chip Select, Pin 17 (PLCC, Pin 19).
CS low enables serial port for read or write. When CS transitions high, all data transfers are
terminated, port control logic is disabled, and SDO is tri-stated to allow for multiprocessor
interface.
SCLK - Serial Data Clock, Pin 18 (PLCC, Pin 20).
Used to read or write the serial port. Data at SDO is output on the falling edge of SCLK and
held to the next falling edge. Input data on SDI is latched on the rising edge of SCLK.
Outputs
INT - Receive Alarm Interrupt, Pin 14 (PLCC, Pin 16).
Pulled low to flag host controller when an alarm interrupt condition occurs. The user may select
which alarm conditions will trigger an interrupt by appropriately setting the Receive Interrupt
Mask Register (RIMR). INT is an open drain output, and should be tied to the positive supply
(VDD) through a resistor.
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