CS4201 Datasheet, PDF (31/68 Pages) Cirrus Logic – CrystalClear Audio Codec 97 with headphone Amplifier

CS4201
4.15 Audio Sample Rate Control Registers (Index 2Ch - 32h)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SR15 SR14 SR13 SR12 SR11 SR10 SR9 SR8 SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0
SR[15:0]
Sample Rate Select. The Audio Sample Rate Control Registers (Index 2Ch - 32h) control
playback and capture sample rates. The PCM Front DAC Rate Register (Index 2Ch) controls
the Front Left and Front Right DAC sample rates. The PCM L/R ADC Rate Register
(Index 32h) controls the Left and Right ADC sample rates. There are seven sample rates di-
rectly supported by this register, shown in Table 8. Any value written to this register not con-
tained inTable 8 is not directly supported and will be decoded according to the ranges
indicated in the table. The range boundaries have been chosen so that only bits SR[15:12] of
each register will have to be considered. All register read transactions will reflect the actual
value stored (column 2 in Table 8) and not the one attempted to be written.
Default
BB80h. This value corresponds to 48 kHz sample rate.
Writes to the PCM Front DAC Rate Register (Index 2Ch) and the PCM L/R ADC Rate Register (Index 32h) are only
available in Variable Rate PCM Audio mode when the VRA bit in the Extended Audio Status/Control Register
(Index 2Ah) is ‘set’. If VRA = 0, writes to the register are ignored and the register will always read BB80h.
Sample Rate
(Hz)
8,000
11,025
16,000
22,050
32,000
44,100
48,000
SR[15:0], register
content (hex value)
1F40
2B11
3E80
5622
7D00
AC44
BB80
SR[15:0], decode
range (hex value)
0000 - 1FFF
2000 - 2FFF
3000 - 3FFF
4000 - 5FFF
6000 - 7FFF
8000 - AFFF
B000 - FFFF
SR[15:12], decode
range (bin value)
0000 - 0001
0010 - 0010
0011 - 0011
0100 - 0101
0110 - 0111
1000 - 1010
1011 - 1111
Table 8. Directly Supported SRC Sample Rates for the CS4201
DS483PP3
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