WM8232 Datasheet, PDF (30/141 Pages) Wolfson Microelectronics plc – 70MSPS 3-Channel AFE with Sensor Timing Generation and LVDS/CMOS Data Output

WM8232
LVDS DATA OUTPUT ORDER
The WM8232 can be presented 2 types of LVDS data output order, Ascending order mode and
Descending order mode as the following.
Ascending Order Mode
10bit 5pair mode
D5
S0
S1
S2 IN1[0] IN1[1] IN1[2] IN1[3]
D4 IN1[4] IN1[5] IN1[6] IN1[7] IN1[8] IN1[9] S3
D3
S4 IN2[0] IN2[1] IN2[2] IN2[3] IN2[4] IN2[5]
D2 IN2[6] IN2[7] IN2[8] IN2[9] IN3[0] IN3[1] IN3[2]
D1 IN3[3] IN3[4] IN3[5] IN3[6] IN3[7] IN3[8] IN3[9]
DCLK H
H
L
L
L
H
H
Decending Order Mode
10bit 5pair mode
D5
S4
S3
S2 IN1[9] IN1[8] IN1[7] IN1[6]
D4 IN1[5] IN1[4] IN1[3] IN1[2] IN1[1] IN1[0] S1
D3
S0 IN2[9] IN2[8] IN2[7] IN2[6] IN2[5] IN2[4]
D2 IN2[3] IN2[2] IN2[1] IN2[0] IN3[9] IN3[8] IN3[7]
D1 IN3[6] IN3[5] IN3[4] IN3[3] IN3[2] IN3[1] IN3[0]
DCLK H
H
L
L
L
H
H
16bit 5pair mode
D5
S0
S1
S2 IN1[0] IN1[1] IN1[2] IN1[3]
D4 IN1[4] IN1[5] IN1[6] IN1[7] IN1[8] IN1[9] IN1[10]
D3 IN1[11] IN1[12] IN1[13] IN1[14] IN1[15] IN2[0] IN2[1]
D2 IN2[2] IN2[3] IN2[4] IN2[5] IN2[6] IN2[7] IN2[8]
D1 IN2[9] IN2[10] IN211] IN2[12] IN2[13] IN2[14] IN2[15]
DCLK H
H
L
L
L
H
H
16bit 5pair mode
D5
S2
S1
S0 IN1[15] IN1[14] IN1[13] IN1[12]
D4 IN1[11] IN1[10] IN1[9] IN1[8] IN1[7] IN1[6] IN1[5]
D3 IN1[4] IN1[3] IN1[2] IN1[1] IN1[0] IN2[15] IN2[14]
D2 IN2[13] IN2[12] IN2[11] IN2[10] IN2[9] IN2[8] IN2[7]
D1 IN2[6] IN2[5] IN2[4] IN2[3] IN2[2] IN2[1] IN2[0]
DCLK H
H
L
L
L
H
H
10bit 3pair mode
D3
S0 IN1[0] IN1[1] IN1[2] IN1[3] IN1[4] IN1[5]
D2 IN1[6] IN1[7] IN1[8] IN1[9] IN2[0] IN2[1] IN2[2]
D1 IN2[3] IN2[4] IN2[5] IN2[6] IN2[7] IN2[8] IN2[9]
DCLK H
H
L
L
L
H
H
10bit 3pair mode
D3
S0 IN1[9] IN1[8] IN1[7] IN1[6] IN1[5] IN1[4]
D2 IN1[3] IN1[2] IN1[1] IN1[0] IN2[9] IN2[8] IN2[7]
D1 IN2[6] IN2[5] IN2[4] IN2[3] IN2[2] IN2[1] IN2[0]
DCLK H
H
L
L
L
H
H
16bit 3pair mode
D3
S0
S1
S2 IN1[0] IN1[1] IN1[2] IN1[3]
D2 IN1[4] IN1[5] IN1[6] IN1[7] IN1[8] IN1[9] IN1[10]
D1 IN111] IN1[12] IN1[13] IN1[14] IN1[15] S3
S4
DCLK H
H
L
L
L
H
H
16bit 3pair mode
D3
S4
S3
S2 IN1[15] IN1[14] IN1[13] IN1[12]
D2 IN1[11] IN1[10] IN1[9] IN1[8] IN1[7] IN1[6] IN1[5]
D1 IN1[4] IN1[3] IN1[2] IN1[1] IN1[0] S1
S0
DCLK H
H
L
L
L
H
H
12bit 4pair mode
D4
S0 IN1[0] IN1[1] IN1[2] IN1[3] IN1[4] IN1[5]
D3 IN1[6] IN1[7] IN1[8] IN1[9] IN1[10] IN1[11] S1
D2
S2
S3 IN2[0] IN2[1] IN2[2] IN2[3] IN2[4]
D1 IN2[5] IN2[6] IN2[7] IN2[8] IN2[9] IN2[10] IN211]
DCLK H
H
L
L
L
H
H
12bit 4pair mode
D4
S3 IN1[11] IN1[10] IN1[9] IN1[8] IN1[7] IN1[6]
D3 IN1[5] IN1[4] IN1[3] IN1[2] IN1[1] IN1[0] S2
D2
S1
S0 IN2[11] IN2[10] IN2[9] IN2[8] IN2[7]
D1 IN2[6] IN2[5] IN2[4] IN2[3] IN2[2] IN2[1] IN2[0]
DCLK H
H
L
L
L
H
H
Table 11 LVDS DATA OUTPUT ORDER
REGISTER
BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R7 (07h)
output
control
3
LVDSORDER
0
control LVDS data output order
0 = descending order
1 = ascending order
30
Rev 4.6