CS4223 Datasheet, PDF (3/32 Pages) Cirrus Logic – 24-Bit 105 dB Audio Codec with Volume Control

CS4223 CS4224
DAC Control Byte (2)........................................................................................ 23
Output Attenuator Data Byte (3, 4) ................................................................... 23
DSP Port Mode Byte (5) ................................................................................... 24
Converter Status Report Byte (Read Only) (6)................................................. 24
Clock/Output Control Byte (7) .......................................................................... 25
5. PIN DESCRIPTIONS — CS4223............................................................................... 26
Power Supply ................................................................................................... 26
Analog Inputs ................................................................................................... 27
Analog Outputs................................................................................................. 27
Digital Inputs..................................................................................................... 27
Digital Outputs .................................................................................................. 28
Miscellaneous Pins........................................................................................... 28
6. PIN DESCRIPTIONS — CS4224............................................................................... 29
Power Supply ................................................................................................... 29
Analog Inputs ................................................................................................... 30
Analog Outputs................................................................................................. 30
Digital Inputs..................................................................................................... 30
Digital Outputs .................................................................................................. 31
Control Port Signals ......................................................................................... 31
Miscellaneous Pins........................................................................................... 32
7. PARAMETER DEFINITIONS..................................................................................... 33
8. PACKAGE DIMENSIONS ......................................................................................... 34
LIST OF FIGURES
Figure 1. Serial Audio Port Data I/O Timing ..................................................................... 6
Figure 2. SPI Control Port Timing ..................................................................................... 7
Figure 3. I²C Control Port Timing ..................................................................................... 8
Figure 4. CS4223 Recommended Connection Diagram ................................................ 10
Figure 5. CS4224 Recommended Connection Diagram ................................................ 11
Figure 6. Optional Line Input Buffer ................................................................................ 13
Figure 7. Single-ended Input Application ........................................................................ 13
Figure 8. Full Scale Input/Output Voltage ....................................................................... 14
Figure 9. Hybrid Analog/Digital Attenuation .................................................................... 15
Figure 10. 2- and 3-Pole Butterworth Filters ................................................................... 15
Figure 11. Audio DSP Data Input Formats. .................................................................... 17
Figure 12. Control Port Timing, SPI mode ...................................................................... 18
Figure 13. Control Port Timing, I²C mode ...................................................................... 18
Figure 14. De-emphasis Curve. ...................................................................................... 19
Figure 15. Suggested Layout Guideline (See CDB4223/4 Data Sheet) ......................... 20
Figure 16. ADC Filter Response ..................................................................................... 21
Figure 17. ADC Passband Ripplee ................................................................................. 21
Figure 18. ADC Transition Band ..................................................................................... 21
Figure 19. DAC Filter Response ..................................................................................... 21
Figure 20. DAC Passband Ripple ................................................................................... 21
Figure 21. DAC Transition Band ..................................................................................... 21
LIST OF TABLES
Table 1. CS4224 vs. CS4223 ........................................................................................... 12
Table 2. High Pass Filter Characteristics ......................................................................... 14
Table 4. Master Mode vs. Slave Mode Clocking. ............................................................. 16
Table 3. Common Clock Frequencies .............................................................................. 16
Table 5. CS4223 De-Emphasis filter control .................................................................... 19
DS290PP3
3