CS8952T Datasheet, PDF (2/86 Pages) Cirrus Logic – 100BASE E-X AND 10BASE-T TRANSCEIVER

CS8952T
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
TABLE OF CONTENTS
INTRODUCTION .......................................................................................................................... 4
High Performance Analog ....................................................................................................... 4
Low Power Consumption ........................................................................................................ 4
Application Flexibility ............................................................................................................... 4
Typical Connection Diagram ................................................................................................... 4
PIN DESCRIPTIONS ...................................................................................................................... 6
FUNCTIONAL DESCRIPTION ..................................................................................................... 17
Digital System Interface ......................................................................................................... 17
Major Operating Modes .......................................................................................................... 17
100BASE-TX Nibble Mode ........................................................................................... 17
100BASE-X Symbol Modes .........................................................................................20
10BASE-T MII Application ............................................................................................ 21
- 10BASE-T Serial Application ..................................................................................... 22
- Auto-Negotiation .................................................................................................................. 22
- Auto-Negotiation Configuration ..................................................................................23
- Auto-Negotiation Operation ........................................................................................ 23
Reset Operation ..................................................................................................................... 24
LED Indicators ........................................................................................................................ 24
MEDIA INDEPENDENT INTERFACE .......................................................................................... 25
- MII Frame Structure ............................................................................................................. 25
- MII Receive Data ................................................................................................................. 26
MII Transmit Data ................................................................................................................... 26
MII Management Interface ..................................................................................................... 27
MII Management Frame Structure .........................................................................................27
CONFIGURATION ....................................................................................................................... 29
Configuration At Power-up/Reset Time ..................................................................................29
Configuration Via Control Pins ...............................................................................................29
Configuration via the MII ........................................................................................................ 29
CS8952T REGISTERS ................................................................................................................. 30
Basic Mode Control Register - Address 00h .......................................................................... 31
Basic Mode Status Register - Address 01h ........................................................................... 33
PHY Identifier Register, Part 1 - Address 02h ........................................................................ 35
PHY Identifier Register, Part 2 - Address 03h ........................................................................ 36
Auto-Negotiation Advertisement Register - Address 04h ....................................................... 37
Auto-Negotiation Link Partner Ability Register - Address 05h ................................................ 38
Auto-Negotiation Expansion Register - Address 06h ............................................................. 39
Auto-Negotiation Next-Page Transmit Register - Address 07h .............................................. 40
Interrupt Mask Register - Address 10h ..................................................................................41
Interrupt Status Register - Address 11h ................................................................................. 44
Disconnect Count Register - Address 12h ............................................................................. 47
False Carrier Count Register - Address 13h .......................................................................... 48
Scrambler Key Initialization Register - Address 14h .............................................................. 49
Receive Error Count Register - Address 15h ......................................................................... 50
Descrambler Key Initialization Register - Address 16h .......................................................... 51
PCS Sub-Layer Configuration Register - Address 17h .......................................................... 52
Loopback, Bypass, and Receiver Error Mask Register - Address 18h .................................. 55
Self Status Register - Address 19h ........................................................................................ 58
10BASE-T Status Register - Address 1Bh ............................................................................. 60
10BASE-T Configuration Register - Address 1Ch ................................................................. 61
DESIGN CONSIDERATIONS ......................................................................................................63
Twisted Pair Interface ............................................................................................................63
Internal Voltage Reference .................................................................................................... 63
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
2
DS206TPP2