CS42426_05 Datasheet, PDF (2/73 Pages) Cirrus Logic – 114 dB, 192 kHz 6-Ch Codec with PLL

CS42426
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 6
SPECIFIED OPERATING CONDITIONS ............................................................................................... 6
ABSOLUTE MAXIMUM RATINGS ......................................................................................................... 6
ANALOG INPUT CHARACTERISTICS .................................................................................................. 7
A/D DIGITAL FILTER CHARACTERISTICS .......................................................................................... 8
ANALOG OUTPUT CHARACTERISTICS .............................................................................................. 9
D/A DIGITAL FILTER CHARACTERISTICS ........................................................................................ 10
SWITCHING CHARACTERISTICS ...................................................................................................... 11
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT .............................................. 12
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI^™ FORMAT .......................................... 13
DC ELECTRICAL CHARACTERISTICS .............................................................................................. 14
DIGITAL INTERFACE CHARACTERISTICS ....................................................................................... 15
2. PIN DESCRIPTIONS ............................................................................................................................ 16
3. TYPICAL CONNECTION DIAGRAMS .............................................................................................. 18
4. APPLICATIONS ................................................................................................................................... 20
4.1 Overview ......................................................................................................................................... 20
4.2 Analog Inputs .................................................................................................................................. 20
4.2.1 Line-Level Inputs ................................................................................................................... 20
4.2.2 High-Pass Filter and DC Offset Calibration ........................................................................... 21
4.3 Analog Outputs ............................................................................................................................... 21
4.3.1 Line-Level Outputs and Filtering ........................................................................................... 21
4.3.2 Interpolation Filter .................................................................................................................. 21
4.3.3 Digital Volume and Mute Control ........................................................................................... 22
4.3.4 ATAPI Specification ............................................................................................................... 22
4.4 Clock Generation ............................................................................................................................ 23
4.4.1 PLL and Jitter Attenuation ..................................................................................................... 23
4.4.2 OMCK System Clock Mode ................................................................................................... 24
4.4.3 Master Mode ......................................................................................................................... 24
4.4.4 Slave Mode ........................................................................................................................... 24
4.5 Digital Interfaces ............................................................................................................................. 25
4.5.1 Serial Audio Interface Signals ............................................................................................... 25
4.5.2 Serial Audio Interface Formats .............................................................................................. 27
4.5.3 ADCIN1/ADCIN2 Serial Data Format .................................................................................... 30
4.5.4 One-Line Mode (OLM) Configurations .................................................................................. 31
4.5.4.1 OLM Config #1 ........................................................................................................... 31
4.5.4.2 OLM Config #2 ........................................................................................................... 32
4.5.4.3 OLM Config #3 ........................................................................................................... 33
4.5.4.4 OLM Config #4 ........................................................................................................... 34
4.6 Control Port Description and Timing ............................................................................................... 35
4.6.1 SPI Mode ............................................................................................................................... 35
4.6.2 I²C Mode ................................................................................................................................ 36
4.7 Interrupts ........................................................................................................................................ 37
4.8 Reset and Power-Up ...................................................................................................................... 37
4.9 Power Supply, Grounding, and PCB Layout .................................................................................. 38
5. REGISTER QUICK REFERENCE ........................................................................................................ 39
6. REGISTER DESCRIPTION .................................................................................................................. 42
6.1 Memory Address Pointer (MAP) ..................................................................................................... 42
6.2 Chip I.D. and Revision Register (address 01h) (Read Only) .......................................................... 42
6.3 Power Control (address 02h) .......................................................................................................... 43
6.4 Functional Mode (address 03h) ...................................................................................................... 43
6.5 Interface Formats (address 04h) .................................................................................................... 45
6.6 Misc Control (address 05h) ............................................................................................................ 46
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