CS42426_05 Datasheet, PDF (19/73 Pages) Cirrus Logic – 114 dB, 192 kHz 6-Ch Codec with PLL

CS42426
+3.3 V to +5 V
+ 0.1 µF 0.01 µF
10 µF
0.01 µF 0.1 µF ₊
10 µF
+5 V
+1.8 V
to +5.0 V
27 MHz
+
10 µF
DVD
P ro c e s s o r
0.1 µF
0.01 µF
0.01 µF 0.1 µF ₊
10 µF
4
51
VD
VD
48 _GPO1
47 _GPO2
46 _GPO3
45 _GPO4
44 _GPO5
43 _GPO6
42 _GPO7
41
24
VA
VA
36
AOUTA1+
37
AOUTA1-
35
AOUTB1+
34
AOUTB1-
32
AOUTA2+
33
AOUTA2-
A nalog O utput Buffer ²
and
M ute C ircuit (optional)
A nalog O utput B uffer ²
and
M ute C ircuit (optional)
A nalog O utput B uffer ²
and
M ute C ircuit (optional)
53
VLS
0.1 µF
59 _OMCK
58 _ADCIN1
57 _ADCIN2
55
RMCK
CS42426
56 _{ADC_SDOUT}
60
ADC_LRCK
61
ADC_SCLK
3 _{DAC_LRCK}
2
DAC_SCLK
1 _{DAC_SDIN1}
64 _{D A C _S D IN 2}
63 _{DAC_SDIN3}
AOUTB2+ ³¹
30
AOUTB2-
AOUTA3+ ²⁸
29
AOUTA3-
AOUTB3+ ²⁷
AOUTB3- ²⁶
A nalog O utput B uffer ²
and
M ute C ircuit (optional)
A nalog O utput B uffer ²
and
M ute C ircuit (optional)
A nalog O utput B uffer ²
and
M ute C ircuit (optional)
+VA
38 *
MUTEC
*
15
A IN L +
16
A IN L -
M ute
D rive
(o p tio n a l)
* P ull up or dow n as
required on startup if the
M ute C ontrol is used.
A nalog
2I7n0p0u _tp F *
Buffer ¹
Left A nalog Input
2 kΩ
11
12
7
8
9
10
**
**
2 kΩ
6
0.1 µF
IN T
RST
S C L /C C L K
SDA/CDO UT
A D 1 /C D IN
A D 0 /C S
VLC
14
A IN R +
13
A IN R -
A nalog
2I7n0p0u tp F *
Buffer ¹
R ight Analog Input
VQ ¹⁷
FILT+ ¹⁸
REFGND ¹⁹
39
LPFLT
+
0.1 µF 100 µF
R FILT ³
+
0.1 µF 4.7 µF
** R esistors are required for
I²C control port operation
DGND DGND
5
52
AGND
25
AGND
40
C FILT ³
C RIP ³
C onnect D G N D and A G N D at single point near C odec
1. S ee the A D C Input Filter section in the A ppendix.
2. S ee the D A C O utput Filter section in the A ppendix.
3. S ee the P LL Filter section in the A ppendix.
Figure 6. Typical Connection Diagram using the PLL
DS604F1
19