English
Language : 

CS42418_05 Datasheet, PDF (18/73 Pages) Cirrus Logic – 110 dB, 192 kHz 8-Ch Codec with PLL
3. TYPICAL CONNECTION DIAGRAMS
+3.3 V to +5 V
+ 0.1 µF 0.01 µF
10 µF
CS42418
0.01 µF 0.1 µF +
10 µF
+5 V
+3.3 V
to +5.0 V
+ 0.1 µF 0.01 µF
10 µF
0.01 µF 0.1 µF +
10 µF
Optional
S/PDIF
CS8416
Receiver
RMCK
4
51
VD
VD
48 GPO1
47 GPO2
46 GPO3
45 GPO4
44 GPO5
43 GPO6
42 GPO7
41
24
VA
VA
36
AOUTA1+
37
AOUTA1-
35
AOUTB1+
34
AOUTB1-
32
AOUTA2+
33
AOUTA2-
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
OSC
CS5361
A/D Converter
CS5361
A/D Converter
53
VLS
0.1 µF
59 OMCK
58 ADCIN1
57 ADCIN2
55
RMCK
CS42418
AOUTB2+ 31
30
AOUTB2-
28
AOUTA3+
AOUTA3- 29
AOUTB3+ 27
26
AOUTB3-
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
+1.8 V
to +5 V
Digital Audio
Processor
56 ADC_SDOUT
60
ADC_LRCK
61
ADC_SCLK
3 DAC_LRCK
2
DAC_SCLK
1 DAC_SDIN1
64 DAC_SDIN2
63 DAC_SDIN3
62
DAC_SDIN4
Micro-
Controller
2 kΩ
11
INT
12
RST
7
SCL/CCLK
8
SDA/CDOUT
9
AD1/CDIN
10 AD0/CS
**
**
2 kΩ
6
VLC
0.1 µF
22
AOUTA4+
AOUTA4- 23
Analog Output Buffer 2
and
Mute Circuit (optional)
21
AOUTB4+
20
AOUTB4-
+VA
38 *
MUTEC
*
15
AINL+
AINL- 16
Analog Output Buffer 2
and
Mute Circuit (optional)
Mute
Drive
(optional)
Analog
2I7n0p0utpF*
Buffer 1
* Pull up or down as
required on startup if the
Mute Control is used.
Left Analog Input
14
AINR+
13
AINR-
Analog
2I7n0p0utpF*
Buffer 1
Right Analog Input
VQ 17
FILT+ 18
REFGND 19
39
LPFLT
+
0.1 µF 100 µF
RFILT 3
+
0.1 µF 4.7 µF
** Resistors are required for
I2C control port operation
DGND DGND
5 52
AGND AGND
25
40
CFILT 3 CRIP 3
Connect DGND and AGND at single point near Codec
1. See the ADC Input Filter section in the Appendix.
2. See the DAC Output Filter section in the Appendix.
3. See the PLL Filter section in the Appendix.
Figure 5. Typical Connection Diagram
18
DS603F1