CS4362A Datasheet, PDF (16/47 Pages) Cirrus Logic – 114 dB, 192 kHz 6-channel D/A Converter

CS4362A
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT
(Inputs: Logic 0 = GND, Logic 1 = VLC, C_L = 30 pF)
Parameter
SCL Clock Frequency
RST Rising Edge to Start
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
(Note 16)
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
Acknowledge Delay from SCL Falling
Symbol
Min
f_scl
-
t_irs
500
t_buf
4.7
t_hdst
4.0
t_low
4.7
t_high
4.0
t_sust
4.7
t_hdd
0
t_sud
250
t_rc, t_rc
-
t_fc, t_fc
-
t_susp
4.7
t_ack
300
Notes:
16. Data must be held for sufficient time to bridge the transition time, t_fc, of SCL.
Max
Unit
100
kHz
-
ns
-
µs
-
µs
-
µs
-
µs
-
µs
-
µs
-
ns
1
µs
300
ns
-
µs
1000
ns
RST
t _irs
Stop
Start
SDA
SCL
t _buf
t _hdst
t _high
t _low
t _hdd
Repeated
Start
t _hdst
tf
t _sud
t _sust
tr
Figure 3. Control Port Timing - I²C Format
Stop
t _susp
16
DS617PP1