CS4334_04 Datasheet, PDF (16/25 Pages) Cirrus Logic – 8-Pin, 24-Bit, 96 kHz Stereo D/A Converter

CS4334/5/8/9
LRCK
SCLK
Left Channel
Right Channel
SDATA 1 0
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
32 clocks
Internal SCLK Mode
Right Justified, 18-Bit Data
INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
External SCLK Mode
Right Justified, 18-Bit Data
Data Valid on Rising Edge of SCLK
SCLK Must Have at Least 36 Cycles per LRCK Period
Figure 13. CS4339 Data Format
16
DS248F3