CS42428_05 Datasheet, PDF (16/73 Pages) Cirrus Logic – 114 dB, 192 kHz 8-Ch Codec with PLL

2. PIN DESCRIPTIONS
CS42428
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
DAC_SDIN1 1
DAC_SCLK 2
DAC_LRCK 3
VD 4
DGND 5
VLC 6
SCL/CCLK 7
SDA/CDOUT 8
AD1/CDIN 9
AD0/CS 10
INT 11
RST 12
AINR- 13
AINR+ 14
AINL+ 15
AINL- 16
CS42428
48 GPO1
47 GPO2
46 GPO3
45 GPO4
44 GPO5
43 GPO6
42 GPO7
41 VA
40 AGND
39 LPFLT
38 MUTEC
37 AOUTA1-
36 AOUTA1+
35 AOUTB1+
34 AOUTB1-
33 AOUTA2-
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Pin Name
DAC_SDIN1
DAC_SDIN2
DAC_SDIN3
DAC_SDIN4
DAC_SCLK
DAC_LRCK
VD
DGND
VLC
SCL/CCLK
SDA/CDOUT
AD1/CDIN
AD0/CS
INT
# Pin Description
1
64
63
DAC Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
62
2 DAC Serial Clock (Input/Output) - Serial clock for the DAC serial audio interface.
3
DAC Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on
the DAC serial audio data line.
4
51
Digital Power (Input) - Positive power supply for the digital section.
5
52
Digital Ground (Input) - Ground reference. Should be connected to digital ground.
6 Control Port Power (Input) - Determines the required signal level for the control port.
7 ^{Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external pull-up}
resistor to the logic interface voltage in I²C mode as shown in the Typical Connection Diagram.
Serial Control Data (Input/Output) - SDA is a data I/O line in I²C mode and requires an external pull-up
8 resistor to the logic interface voltage, as shown in the Typical Connection Diagram. CDOUT is the output
data line for the control port interface in SPI mode.
9
Address Bit 1 (I²C)/Serial Control Data (SPI) (Input) - AD1 is a chip address pin in I²C mode; CDIN is
the input data line for the control port interface in SPI mode.
10
Address Bit 0 (I²C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C mode; CS
is the chip select signal in SPI mode.
11
Interrupt (Output) - The CS42428 will generate an interrupt condition as per the Interrupt Mask register.
See “Interrupts” on page 37 for more details.
16
DS605F1