CS22230 Datasheet, PDF (15/29 Pages) Cirrus Logic – WIRELESS PCI/USB CONTROLLER

nSTOP
nINTA
nCLKRUN
PCLK
nPERR
nSERR
nREQ
Bi-directional
Mini PCI Stop. This signal indicates a target initiated termination of the
current cycle.
Output/Open Drain
Mini PCI Interrupt request A. Generates an interrupt on the Mini PCI bus.
I/O OD
Mini PCI clock run. This signal is an optional signal used by devices to
indicate the clock status.
I/O OD
Mini PCI clock. Typically a 33 MHz. All CS22230 Mini PCI activity is
synchronous to PCLK.
Bi-directional
Mini PCI Parity error. This signal is asserted two clocks after a data parity
error is detected on the Mini PCI bus.
Output/Open Drain
Mini PCI system error. This open drain signal is used to indicate a fatal
parity error on Mini PCI address.
Input
Mini PCI Master Request. Used by the Mini PCI master to indicate it
needs drive the Mini PCI bus.
nGNT
PAR
PME
System Reset
nRST
USB Interface
USBVP
Bi-directional
Mini PCI Master Grant. Used by the Mini PCI master to indicate OK to
drive the Mini PCI bus.
Bi-directional
Mini PCI parity. This signal is asserted one clock after data transfer has
occurred on the Mini PCI bus.
Output/Open Drain
Power management event. Use to let the system knows a change in
power management event has occurred.
Input
System reset and Mini PCI Reset. Reset is an asynchronous signal that
forces the chip to go to a known state. This is an active low signal.
Bi-directional
Differential USB data plus. For high-speed mode, this signal is pull up to 5
volt during IDLE state (see USB_ENUM).
CS22230 Mini PCI / USB Wireless Controller
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DS558PP1 Rev. 1.0