WM8224 Datasheet, PDF (1/50 Pages) Wolfson Microelectronics plc – 60MSPS 3-Channel AFE with Multiple Device Operation and Programmable Automatic Black Level Calibration

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WM8224
60MSPS 3-Channel AFE with Multiple Device Operation
and Programmable Automatic Black Level Calibration
DESCRIPTION
FEATURES
The WM8224 is an analogue front end/digitiser IC which
processes and digitises the analogue output signals from
CCD sensors or Contact Image Sensors (CIS) at pixel
sample rates of up to 60MSPS.
The device includes three analogue signal processing
channels each of which contains Reset Level Clamping,
Correlated Double Sampling and Programmable Gain and
Offset adjust functions. The output from each of these
channels is time multiplexed into a single high-speed 16-bit
Analogue to Digital Converter. The digital data is available in
a variety of output formats via the flexible data port.
An internal 4-bit DAC is supplied for internal reference level
generation. This may be used during CDS to reference CIS
signals or during Clamping to clamp CCD signals. An
external reference level may also be supplied. ADC
references are generated internally, ensuring optimum
performance from the device.
 12 or 16-bit ADC, 40MSPS conversion rate
 8 or 10-bit ADC, 60MSPS conversion rate
 Low power – 360 mW typical
 3.3V single supply operation
 3 channel operation
 Daisy Chain feature for multiple device use
 Correlated double sampling
 Programmable gain (9-bit resolution)
 Programmable offset adjust (8-bit resolution)
 Flexible clamp timing
 Programmable clamp voltage
 Internally generated voltage references
 Automatic Black Level Calibration
 32-lead QFN package
 Serial control interface
A programmable automatic Black-Level Calibration function
is available to adjust the DC offset of the output data. A
daisy chain feature allows multiple devices to operate
together using the same control interface and output data
bus.
APPLICATIONS
 Digital Copiers
 USB2.0 compatible scanners
 Multi-function peripherals
 High-speed CCD/CIS sensor interface
BLOCK DIAGRAM
VRLC/VBIAS
RSMP VSMP
MCLK
AVDD
VRT VRX VRB
DVDD
RINP
GINP
BINP
CLMP R
V
S
S
TIMING CONTROL
VREF/BIAS
RLC
CDS
RLC
CDS
RLC
CDS
RLC
DAC
+
OFFSET
DAC
PGA
I/P SIGNAL
POLARITY
ADJUST
+ PGA
OFFSET
DAC
I/P SIGNAL
POLARITY
ADJUST
+
M
+U
X
16-
BIT
ADC
+ PGA
+
OFFSET
DAC
I/P SIGNAL
POLARITY
ADJUST
BLACK LEVEL
CALIBRATION
AGND1
AGND2
WM8224
DATA
+
O/P
PORT
SERIAL
CONTROL
INTERFACE
OEB
OP[0]
OP[1]
OP[2]
OP[3]
OP[4]
OP[5]
OP[6]
OP[7]
OP[8]
OP[9]
OP[10]
OP[11]/SDO
DSLCT
SEN
SCK
SDI
DGND
WOLFSON MICROELECTRONICS plc
Production Data, September 2013, Rev 4.2
Copyright 2013 Wolfson Microelectronics plc.