CS5371_05 Datasheet, PDF (1/22 Pages) Cirrus Logic – Low-power, High-performance ΔΣ Modulators

CS5371
CS5372
Low-power, High-performance ∆Σ Modulators
Features & Description
Description
z Fourth-order ∆Σ Architecture
z Clock-jitter-tolerant Architecture
z Input Voltage: 5 V_pp Fully Differential
z High Dynamic Range
Π127 dB SNR @ 215 Hz BW (2 ms Output)
Π124 dB SNR @ 430 Hz BW (1 ms Output)
z Low Total Harmonic Distortion
Π-118 dB THD Typical, -112 dB THD Maximum
z Low Power Consumption
ΠNormal Mode: 25 mW per Channel
ΠLow-power Mode: 15 mW per Channel
z Small Footprint, 24-pin SSOP Package
z Single- or Multi-channel System Support
Π1-channel System: CS5371
Π2-channel System: CS5372
Π3-channel System: CS5371 + CS5372
Π4-channel System: CS5372 + CS5372
z Single or Dual Power Supply Configurations
ΠVA+ = +5 V; VA- = 0 V; VD = +3.3 V to +5 V
ΠVA+ = +2.5 V;VA- = -2.5 V;VD = +3.3 V
The CS5371 and CS5372 are one- and two-channel,
high dynamic range, fourth-order ∆Σ modulators intend-
ed for geophysical and sonar applications. Used in
combination with the CS5376A or CS5378 digital filters,
a unique high-resolution A/D measurement system
results.
The CS5371 and CS5372 have high dynamic range
(127 dB @ 215 Hz bandwidth) and low total harmonic
distortion (typically -118 dB THD), with very low power
consumption per channel. In normal mode
(LPWR=0, MCLK=2.048MHz), power consumption is
25 mW per channel, and in low-power mode
(LPWR=1, MCLK=1.024MHz), power consumption is
15 mW per channel. Each modulator can be indepen-
dently powered down to 1 mW per channel, and by
halting the input clock, they will enter a micropower state
using only 10 µW per channel.
The modulators generate an oversampled serial bit
stream at 512 kbits per second when operated from a
clock frequency of 2.048 MHz. They are available in a
small 24-pin SSOP package, providing exceptional per-
formance in a very small footprint.
ORDERING INFORMATION
See page 21.
VA+
PWDN
VD
INF+
INR+
4^TH ORDER
INR-
∆−Σ MODULATOR
INF-
VREF+
VREF-
CS5371
VA-
CLOCK
GENERATOR
OFST LPWR DGND
MFLAG
MDATA
MCLK
MSYNC
INF1+
INR1+
INR1-
INF1-
VREF+
VREF-
INF2+
INR2+
INR2-
INF2-
VA+
PWDN1
VD
4^TH ORDER
∆−Σ MODULATOR
MFLAG1
MDATA1
CLOCK
GENERATOR
MCLK
MSYNC
4^TH ORDER
∆−Σ MODULATOR
MFLAG2
MDATA2
CS5372
VA-
PWDN2 OFST LPWR DGND
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
OCT ‘05
DS255F3