CS42L73 Datasheet, PDF (1/7 Pages) Cirrus Logic – Ultra Low Power Mobile Audio and Telephony CODEC

CS42L73
Ultra Low Power Mobile Audio and Telephony CODEC
Product Overview
For the full datasheet, visit
www.cirrus.com/codec-datasheets/CS42L73-17
 Stereo ADC
 Dual Analog or Digital MIC Support
 Dual MIC Bias Generators
 Four DACs Coupled to Five Outputs
– Ground-Centered Stereo Headphone Amp.
– Ground-Centered Stereo Line Output
– Mono Ear Speaker Amplifier
– Mono 1 W Speakerphone Amplifier
– Mono Speakerphone Line Output for Stereo
Speakerphone Expansion
 Three Serial Ports with Asynchronous Sample
Rate Converters
 Digital Audio Mixing and Routing
Ultra Low Power Consumption
 3.5 mW Quiescent Headphone Playback
Applications
 Smart Phones, UMPCs, and MIDs
System Features
 Native (no PLL required) Support for 6/12/24
MHz, 13/26 MHz, and 19.2/38.4 MHz Master
Clock Rates in Add. to Typ. Audio Clock Rates
 Integrated High-efficiency Power Management
Reduces Power Consumption
– Internal LDO Regulator to Reduce Internal
Digital Operating Voltage to VL/2
– Step-down Charge Pump Provides Low
Headphone/Line Out Supply Voltage
– Inverting Charge Pump Accommodates Low
System Voltage by Providing Negative Rail
for HP and Line Amp
 Flexible Speakerphone Amplifier Powering
– 3.00 V to 5.25 V Range
– Independent Cycling
 Power Down Management
– Individual Controls for ADCs, Dig. MIC
Interface, MIC Bias Generators, Serial Ports,
and Output Amplifiers & Associated DACs
 Programmable Thermal Overload Notification
 High-speed I²C™ Control Port (400 kHz)
(Features continued on page 2)
VL
VD_FILT
MCLK1
MCLK2
LDO
VD_FILT
MCLK
Control Port
Auxiliary Serial Port
Audio Serial Port
Voice Serial Port
Digital MIC Interface
Control Port
Auxiliary
Serial Port
SDIN
ASRC
ASRC
SDOUT
Audio
Serial Port
SDIN
ASRC
ASRC
SDOUT
Voice
Serial Port
SDIN
ASRC
ASRC
SDOUT
Digital MIC Interface
VA
VA
CS42L73
Digital Processing
Digital Mixer
MIC/Line Input Path
Auxiliary Serial Port
`₊
Audio Serial Port
Voice Serial Port
VCP +VCP_FILT -VCP_FILT
Step-Down
Inverting
Volume, Mute, Limiter
Volume, Mute, Limiter
+VCP_FILT
-VCP_FILT
MCLK
Stereo
Multi-bit
 DAC
MCLK
Stereo
Multi-bit
 DAC
+VCP_FILT
-
+
-VCP_FILT
+VCP_FILT
-
+
-VCP_FILT
VA
B
VP
A
VP
B
Decimator,
HPF,
Noise
Gate,
ALC,
Volume,
Mute,
Swap/Mono
MCLK
Stereo
Multi-bit
 ADC
+
-
-6 to +12 dB,
0.5 dB steps
VP
MIC Bias
MIC Bias Short Detect
+10 or
+20 dB
+
-
+
-
+10 or
+20 dB
Headphone Outputs
Pseudo Diff. Input
Line Outputs
Pseudo Diff. Input
+
-
Ear
Speaker
Output
VP
+ Speakerphone Output
- (Left)
+ Speakerphone Line
- Output (Right)
Line Input (Left)
Pseudo Diff. Input
Line Input (Right)
MIC 1
Pseudo Diff. Input
MIC 2
Pseudo Diff. Input
Advance Product Information
http://www.cirrus.com
MIC 1 Bias MIC 2 Bias MIC2_SDET
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright  Cirrus Logic, Inc. 2010
(All Rights Reserved)
MAY ‘10
DS882PB1