CS4124 Datasheet, PDF (4/6 Pages) Cherry Semiconductor Corporation – High Side PWM FET Controller

Application Information
Theory Of Operation
Oscillator
The IC sets up a constant frequency triangle wave at the
C_OSC lead whose frequency is related to the external com-
ponents R_OSC and C_OSC, by the following equation:
0.83
Frequency =
R_OSC × C_OSC
The peak and valley of the triangle wave are proportional
to V_CC by the following:
V_VALLEY = 0.1 × V_CC
V_PEAK = 0.7 × V_CC
This is required to make the voltage compensation function
properly. In order to keep the frequency of the oscillator
constant the current that charges C_OSC must also vary with
supply. R_OSC sets up the current which charges C_OSC. The
voltage across R_OSC is 50% of V_CC and therefore:
I_ROSC = 0.5 × ^VCC
R_OSC
I_ROSC is multiplied by (2) internally and transferred to the
C_OSC lead. Therefore:
I_COSC = ±
V_CC
R_OSC
The period of the oscillator is:
T = 2C_OSC ×
V_PEAK - V_VALLEY
I_COSC
The R_OSC and C_OSC components can be varied to create fre-
quencies over the range of 15Hz to 25kHz. With the sug-
gested values of 93.1kΩ and 470pF for R_OSC and C_OSC , the
nominal frequency will be approximately 20 kHz. I_ROSC, at
V_CC = 14V, will be 66.7 µA. I_ROSC should not change over a
more than 2:1 ratio and therefore C_OSC should be changed
to adjust the oscillator frequency.
pensated duty cycle. The transfer is set up so that when
V_CC = 14V the duty cycle will equal V_CTL divided by V_REG.
For example at V_CC = 14V, V_REG = 5V and V_CTL = 2.5V, the
duty cycle would be 50% at the output. This would place a
7V average voltage across the load. If V_CC then drops to
10V, the IC would change the duty cycle to 70% and hence
keep the average load voltage at 7V.
120%
100%
VCC = 8V
80%
60%
40%
VCC = 14V
VCC = 16V
20%
0%
10%
20%
30%
40% 50% 60% 70%
CTL Voltage (% of VREG)
80%
90% 100%
Figure 1: Voltage Compensation
5V Linear Regulator
There is a 5V, 5mA linear regulator available at the V_REG
lead for external use. This voltage acts as a reference for
many internal and external functions. It has a drop out of
approximately 1.5V at room temperature.
Current Sense and Timer
The IC differentially monitors the load current on a cycle
by cycle basis at the I_SENSE+ and I_SENSE- leads. The differen-
tial voltage across these two leads is amplified internally
and compared to the voltage at the I_ADJ lead. The gain, A_V
is set internally and externally by the following equation:
A_V =
V_I(ADJ)
I_SENSE+ - I_SENSE-
=
37000
1000 + R_CS
Voltage Duty Cycle Conversion
The IC translates an input voltage at the CTL lead into a
duty cycle at the OUTPUT lead. The transfer function
incorporates Cherry Semiconductor’s patented Voltage
Compensation method to keep the average voltage and
current across the load constant regardless of fluctuations
in the supply voltage. The duty cycle is varied based upon
the input voltage and supply voltage by the following
equation:
Duty Cycle = 100% × ^{2.8 × VCTL}
V_CC
An internal DC voltage equal to:
V_DC = (1.683 × V_CTL) + V_VALLEY
is compared to the oscillator voltage to produce the com-
The current limit (I_LIM) is set by the external current sense
resistor (R_SENSE) placed across the I_SENSE+ and I_SENSE- ter-
minals and the voltage at the I_ADJ lead.
1000 + R_CS
V_I(ADJ)
I_LIM =
37000
× _RSENSE
The R_CS resistors and C_CS components form a differential
low pass filter which filters out high frequency noise gen-
erated by the switching of the external MOSFET and the
associated lead noise. R_CS also forms and error term in the
gain of the I_LIM equation because the I_SENSE+ and I_SENSE-
leads are low impedance inputs thereby creating a good
current sensing amplifier. Both leads source 50µA while
the chip is in run mode. I_ADJ should be biased between 1V
and 4V. When the current through the external MOSFET
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