English
Language : 

CS5166 Datasheet, PDF (1/22 Pages) Cherry Semiconductor Corporation – 5-Bit Synchronous CPU Controller with Power-Good and Current Limit
CS5166
5-Bit Synchronous CPU Controller
with Power-Good and Current Limit
Description
Features
The CS5166 is a synchronous
dual NFET Buck Regulator
Controller. It is designed to pow-
er the core logic of the latest high
performance CPUs. It uses the
V2TM control method to achieve
the fastest possible transient
response and best overall regula-
tion. It incorporates many addi-
tional features required to ensure
the proper operation and protec-
tion of the CPU and power sys-
tem. The CS5166 provides the
industry’s most highly integrat-
ed solution, minimizing external
component count, total solution
size, and cost.
The CS5166 is specifically
designed to power Intel’s
Pentium® II processor and
includes the following features:
5-bit DAC with 1% tolerance,
Power-Good output, adjustable
hiccup mode over-current pro-
tection, VCC monitor, Soft Start,
adaptive voltage positioning,
over-voltage protection, remote
sense and current sharing capa-
bility.
The CS5166 will operate over a
4.15 to 14V range and is available
in a 16 lead wide body surface
mount package.
Application Diagram
5V to 2.8V @ 14.2A for 300MHz Pentium® II
5V
12V
1200µF/10V x 3
330pF
0.1µF
0.1µF
1µF
COFF
SS
COMP
VID0
VID1
VID2
VID3
VID4
VCC
GATE(H)
CS5166
ISENSE
GATE(L)
PGnd
LGnd
PWRGD VFB
1.2µH
3.0mΩ
510
0.1µF
1200µF
10V x 5
PWRGD
Pentium® II
System
3.3K
1000pF
VID4
VID3
VID2
VID1
VID0
V2 is a trademark of Switch Power, Inc.
Pentium is a registered trademark of Intel Corporation.
s V2TM Control Topology
s Dual N-Channel Design
s 125ns Controller Transient Response
s Excess of 1Mhz Operation
s 5-bit DAC with 1% Tolerance
s Power-Good Output with Internal
Delay
s Adjustable Hiccup Mode Over
Current Protection
s Complete Pentium®II System
Requires just 21 Components
s 5V and 12V Operation
s Adaptive Voltage Positioning
s Remote Sense Capability
s Current Sharing Capability
s VCC Monitor
s Overvoltage Protection (OVP)
s Programmable Soft Start
s 200ns PWM Blanking
s 65ns FET Non-Overlap
s 40ns Gate Rise and Fall Times
(3.3nF load)
Package Options
16 Lead SO WIDE
VID0 1
VID1
VID2
VID3
SS
VID4
COFF
ISENSE
VFB
COMP
LGnd
PWRGD
GATE(L)
PGnd
GATE(H)
VCC
Rev. 6/28/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
1
A
® Company