CM8500A Datasheet, PDF (9/13 Pages) List of Unclassifed Manufacturers – 3A BUS TERMINATOR

SSTL_2 TERMINATED OUTPUT
CM8500A
3A BUS TERMINATOR
Single Terminated Output
Double Terminated Output
Figure 5. SSTL_2 Terminated
Output
Note.
The SSTL_2 specification requires adequate output current drive so that parallel termination schemes can be used. The use
of parallel termination is important for high-speed signaling, since it allows proper termination of the bus transmission lines,
which reduces signal reflections. The result will be improved settling, lower EMI emissions, and higher possible clock rates. A
minimumtermination resistance of 23Ω to VTT can be used and still comply with the minimum output voltages and output
currents of theSSTL_2 specification.
Two choices for implementing the parallel termination are shown in Figure 5.
Double Terminated Output
The bus is terminated at both ends with a 50Ω resistor, for a combined parallel resistance of 25Ω.
Single Terminated Output
The bus is terminated at the far end from the controller with a single 25Ω resistor.
It is strongly recommended that the single resistor termination scheme be used for best performance. The benefits of this
approach include reduced cost, simpler signal routing, reduced reflections, and better signal bandwidth and settling.
2008/01/16
Champion Microelectronic Corporation
Page 9