CEM4804 Datasheet, PDF (4/5 Pages) Chino-Excel Technology – Dual N-Channel Enhancement Mode Field Effect Transistor

CEM4804
1.60
1.40
VDS=VGS
ID=250Ó´A
1.20
1.00
0.80
0.60
0.40
-50 -25 0 25 50 75 100 125 150
Tj, Junction Temperature ( C)
Figure 5. Gate Threshold Variation
with Temperature
20
16
12
8
4
VDS=10V
0
0
3
6
9
12
IDS, Drain-Source Current (A)
Figure 7. Transconductance Variation
with Drain Current
10
VDS=15V
8 ^ID=3.5A
6
4
2
0
0
8
16
24
32
Qg, Total Gate Charge (nC)
Figure 9. Gate Charge
5-101
1.15
ID=250Ó´A
1.10
1.05
1.00
5
0.95
0.90
0.85
-50 -25 0 25 50 75 100 125 150
Tj, Junction Temperature ( C)
Figure 6. Breakdown Voltage Variation
with Temperature
50
10
1.0
0.1
0.6
0.8
1.0
1.2
1.4
VSD, Body Diode Forward Voltage (V)
Figure 8. Body Diode Forward Voltage
Variation with Source Current
10¹
RDS(ON) ^Limit
10⁰
1ms
10ms
100ms
1s
10s
DC
10^-1
TA=25 C
Tj=150 C
-2 Single Pulse
10
10^-1
10¹
10⁰
10¹
VDS, Drain-Source Voltage (V)
Figure 10. Maximum Safe
Operating Area