24LC08 Datasheet, PDF (15/23 Pages) Ceramate Technical – 8K-Bit Serial EEPROM

24LC08
8K-Bit Serial EEPROM
Table 3-4. D.C. Electrical Characteristics (Continued)
(T_A = – 25^°C to + 70^°C (C), – 40^°C to + 85^°C (I), V_CC = 2.2 V to 5.5 V when reading, 2.5 V to 5.5 V when writing)
Parameter
Symbol
Conditions
Min Typ Max Unit
Input capacitance
C_IN
25^°C, 1MHz,
–
V_CC = 5 V, V_IN = 0 V,
A0, A1, A2, SCL and WP pin
–
10
pF
Input/output capacitance
C_{I/O 25}°_{C, 1MHz,}
V_CC = 5 V, V_I/O = 0 V,
SDA pin
–
–
10
Table 3-5. A.C. Electrical Characteristics
(T_A = – 25^°C to + 70^°C (C), – 40^°C to + 85^°C (I), V_CC = 2.2 V to 5.5 V when reading, 2.5 V to 5.5 V when writing)
Parameter
Symbol Conditions V_CC = 2.2 to 5.5 V
V_CC = 4.5 to 5.5 V
Unit
(Standard Mode)
(Fast Mode)
Min
Max
Min
Max
External clock frequency
F_CLK
–
0
100
0
400
kHz
Clock high time
t_HIGH
–
4
–
0.6
–
µs
Clock low time
t_LOW
–
4.7
–
1.3
–
Rising time
t_R
SDA, SCL
–
1
–
0.3
Falling time
t_F
SDA, SCL
–
0.3
–
0.3
Start condition hold time
t_HD:STA
–
4
–
0.6
–
Start condition setup time t_SU:STA
–
4.7
–
0.6
–
Data input hold time
t_HD:DAT
–
0
–
0
–
Data input setup time
t_SU:DAT
–
0.25
–
0.1
–
Stop condition setup time t_SU:STO
–
4
–
0.6
–
Bus free time
t_BUF Before new
4.7
–
1.3
–
transmission
Data output valid from
t_AA
–
0.3
3.5
–
1
clock low ^(note)
Noise spike width
t_SP
–
–
100
–
50
ns
Write cycle time
t_WR
–
–
10
–
10
ms
NOTE: When acting as a transmitter, the 24LC08 must provide an internal minimum delay time
to bridge the undefined period (minimum 300 ns) of the falling edge of SCL. This is required to avoid unintended
generation of a start or stop condition.
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN
Tel:[phone]
Fax:[phone]
Page 15 of 23
Email: [e-mail]
Http: www.ceramate.com.tw
Rev 1.1 Nov.18, 2002