CMLDM8120_15 Datasheet, PDF (2/3 Pages) Central Semiconductor Corp – SURFACE MOUNT SILICON P-CHANNEL ENHANCEMENT-MODE MOSFET

CMLDM8120
CMLDM8120G*
SURFACE MOUNT SILICON
P-CHANNEL
ENHANCEMENT-MODE
MOSFET
ELECTRICAL CHARACTERISTICS - Continued: (TA=25°C unless otherwise noted)
SYMBOL TEST CONDITIONS
TYP
Qg(tot)
VDS=10V, VGS=4.5V, ID=1.0A
3.56
Qgs
VDS=10V, VGS=4.5V, ID=1.0A
0.36
Qgd
VDS=10V, VGS=4.5V, ID=1.0A
1.52
ton
VDD=10V, VGS=4.5V, ID=0.95A, RG=6Ω
20
toff
VDD=10V, VGS=4.5V, ID=0.95A, RG=6Ω
25
SOT-563 CASE - MECHANICAL OUTLINE
UNITS
nC
nC
nC
ns
ns
PIN CONFIGURATION
w w w. c e n t r a l s e m i . c o m
LEAD CODE:
1) Drain
2) Drain
3) Gate
4) Source
5) Drain
6) Drain
MARKING CODES:
CMLDM8120: C81
CMLDM8120G*: C8G
* Device is Halogen Free by design
R6 (8-June 2015)