CMLDM7002A Datasheet, PDF (2/2 Pages) Central Semiconductor Corp – SURFACE MOUNT PICOmini DUAL N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET

Central^TM
Semiconductor Corp.
CMLDM7002A
CMLDM7002AJ
SURFACE MOUNT PICOmini^TM
DUAL N-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFET
ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
MAX
UNITS
Crss
Ciss
Coss
ton
toff
VSD
VDS=25V, VGS=0, f=1.0MHz
VDS=25V, VGS=0, f=1.0MHz
VDS=25V, VGS=0, f=1.0MHz
VDD=30V, VGS=10V, ID=200mA,
RG=25Ω, RL=150Ω
VGS=0V, IS=400mA
5.0
pF
50
pF
25
pF
20
ns
20
ns
1.2
V
SOT-563 CASE - MECHANICAL OUTLINE
D
A
B
E
E
6
5
4
G
F
1
2
3
C
H
CMLDM7002A (USA Pinout)
R0
CMLDM7002AJ (Japanese Pinout)
LEAD CODE:
1) GATE Q1
2) SOURCE Q1
3) DRAIN Q2
4) GATE Q2
5) SOURCE Q2
6) DRAIN Q1
MARKING CODE: L02
LEAD CODE:
1) SOURCE Q1
2) GATE Q1
3) DRAIN Q2
4) SOURCE Q2
5) GATE Q2
6) DRAIN Q1
MARKING CODE: 02J
R3 (19-December 2003)