NE552R479A Datasheet, PDF (6/9 Pages) California Eastern Labs – NECs 3.0 V, 0.25 W L&S-BAND MEDIUM POWER SILICON LD-MOSFET

NE552R479A
APPLICATION CIRCUIT (2.40-2.48 GHz)
+VG _J3
+VD _J4
C3
C2
C9
C8
C11
C10
P1
GND
C13
C12
J1
RF IN
IN
R1
C14
C7
C5
U1 C1
C6
C4
OU
J2
RF OUT
er=4.2
t=0.028
TAB
500855B
P.C.B. LAYOUT (Units in mm)
79A PACKAGE
4.0
1.7
Drain
Gate
Source
0.5
Through hole φ 0.2 × 33
0.5
6.1
Note:
Use rosin or other material to prevent solder from penetrating
through-holes.
J3
+Vg
C13
C11
C9
C3
J4
+Vd
C2
C8
C10
C12
C5
J1
RF INPUT
R1
NE552R479A
C6
C14
C4
C7
NE552R479A PARTS LIST
1 600S3R3CW
1 TF-100637
4
2 MCH185A101JK
1 MCR03J200
2 600S2R7BW
2 600S5R6CW
1 600S1R5CW
2 TAJB475K010R
2 MCH215F104ZP
2 0805CG102J9BB04
1 NE552R479A
1 703401
1 1250-003
2 2052-5636-02
1 FD-500855B
C14
0603 3.3 pF CAP ATC
17
TEST CIRCUIT BLK
15
2-56 x 3/16 PHILLIPS PAN HEAD
14
C2,C3
0603 100pF CAP ROHM
13
R1
0603 20 OHM RESISTOR ROHM
12
C4,C7
0603 2.7pF CAP ATC
11
C1,C5
0603 5.6pF CAP ATC
10
C6
0805 1.5pF CAP ATC
9
C12, C13 CASE B 4.7 uF CAP AVX
8
C10, C11 0805 .1uF CAP ROHM
7
C8, C9
0805 1000 pF CAP PHIL6
U1
IC NEC
5
P1
GROUND LUG CONCORD
4
J3, J4
FEEDTHRU MURATA
3
J1, J2
FLANGE MOUNT JACK RECEPTACLE
2
PCB
S-BAND MODULE FABRICATION DRAWING
1
C1
J2
RF OUTPUT