THC63LVD1027_15 Datasheet, PDF (10/24 Pages) California Eastern Labs – Dual Link LVDS Repeater

THC63LVD1027_Rev.4.00_E
AC Specifications
Table 10. AC Specifications
Symbol
Parameter
Conditions
Min
t_LT
Phase Lock Loop Set Time
(Fig 7.)
-
Dual-In/Dual-Out
-
CLKIN=75MHz
-
9t_RCP+3
t_DL Data Latency (Fig 8.)
Distribution
Single-In/Dual-Out
CLKIN=75MHz
CLKIN=75MHz
9t_RCP+3
(11+2/7)t_RCP+3
Dual-In/Single-Out CLKIN=37.5MHz (11+2/7)t_RCP+3
t_DEH DE Input High Time (Fig 9.)
-
t_DEL DE Input Low Time (Fig 9.) Single-In/Dual-Out
-
t_DEINT DE Input Period (Fig 9.)
-
2t_RCP
2t_RCP
4t_RCP
Typ
-
9t_RCP+5
9t_RCP+5
(11+2/7)t_RCP+5
(11+2/7)t_RCP+5
-
-
Must be 2n t_RCP
(n=integer)
Max
10
9t_RCP+7
9t_RCP+7
(11+2/7)t_RCP+7
(11+2/7)t_RCP+7
-
-
-
Unit
ms
ns
ns
AC Timing Diagrams
Figure 7. Phase Lock Loop Set Time
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