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NESG2101M05 Datasheet, PDF (1/15 Pages) NEC – NECs NPN SiGe HIGH FREQUENCY TRAN SIS TOR
NEC's NPN SiGe
HIGH FREQUENCY TRANSISTOR
NESG2101M05
FEATURES
• HIGH BREAKDOWN VOLTAGE SiGe TECHNOLOGY
VCEO = 5 V (Absolute Maximum)
• HIGH OUTPUT POWER:
P1dB = 21 dBm at 2 GHz
• LOW NOISE FIGURE:
NF = 0.9 dB at 2 GHz
• HIGH MAXIMUM STABLE POWER GAIN:
MSG = 17 dB at 2 GHz
• LOW PROFILE M05 PACKAGE:
SOT-343 footprint, with a height of only 0.59 mm
Flat lead style for better RF performance
ELECTRICAL CHARACTERISTICS (TA = 25°C)
PART NUMBER
PACKAGE OUTLINE
M05
DESCRIPTION
NEC's NESG2101M05 is fabricated using NECʼs high voltage
Silicon Germanium process (UHS2-HV), and is designed for
a wide range of applications including low noise amplifiers,
medium power amplifiers, and oscillators
NECʼs low profile, flat lead style M05 Package provides high
frequency performance for compact wireless designs.
NESG2101M05
M05
SYMBOLS
PARAMETERS AND CONDITIONS
UNITS
MIN
TYP
MAX
P1dB
Output Power at 1 dB Compression Point
VCE = 3.6 V, ICQ = 10 mA, f = 2 GHz
dBm
21
GL
Linear Gain, VCE = 3.6 V, ICQ = 10 mA, f = 2 GHz
dB
15
NF
Noise Figure at VCE = 2 V, IC = 10 mA, f = 2 GHz,
dB
ZS = ZSOPT, ZL = ZLOPT
0.9
1.2
Ga
Associated Gain at VCE = 2 V, IC = 10 mA, f = 2 GHz,
ZS = ZSOPT, ZL = ZLOPT
dB
11.0
13.0
NF
Noise Figure at VCE = 2 V, IC = 7mA, f = 1 GHz,
ZS = ZSOPT, ZL = ZLOPT
dB
0.6
Ga
Associated Gain at VCE = 2 V, IC = 7 mA, f = 1 GHz,
dB
ZS = ZSOPT, ZL = ZLOPT
19.0
MSG
Maximum Stable Gain1 at VCE = 3 V, IC = 50 mA, f = 2 GHz
dB
14.5
17.0
|S21E|2
Insertion Power Gain at VCE = 3 V, IC = 50 mA, f = 2 GHz
dB
11.5
13.5
fT
Gain Bandwidth Product at VCE = 3 V, IC = 50 mA, f = 2 GHz
GHz
14
17
Cre
Reverse Transfer Capacitance2 at VCB = 2 V, IC = 0 mA, f = 1 MHz
pF
0.4
0.5
ICBO
Collector Cutoff Current at VCB = 5V, IE = 0
nA
100
IEBO
Emitter Cutoff Current at VEB = 1 V, IC = 0
nA
100
hFE
DC Current Gain3 at VCE = 2 V, IC = 15 mA
130
190
260
Notes:
1. MSG =
S21
S12
2. Collector to base capacitance is measured by capacitance meter (automatic balance bridge method) when emitter pin is connected to
the guard pin.
3. Pulsed measurement, pulse width ≤ 350 μs, duty cycle ≤ 2 %.
California Eastern Laboratories