CAT5259_08 Datasheet, PDF (7/16 Pages) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP™) with 256 Taps and I²C Interface

Figure 2. Write Cycle Timing
SCL
SDA
8TH BIT
BYTE n
ACK
Figure 3. Start/Stop Condition
CAT5259
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
SDA
SCL
START CONDITION
STOP CONDITION
Figure 4. Acknowledge Condition
SCL FROM
1
MASTER
8
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
Figure 5. Slave Address Bits
ACKNOWLEDGE
CAT5259 0 1 0 1 A3 A2 A1 A0
* A0, A1, A2 and A3 correspond to pin A0, A1, A2 and A3 of the device.
** A0, A1, A2 and A3 must compare to its corresponding hard wired input pins.
© Catalyst Semiconductor, Inc.
7
Characteristics subject to change without notice
Doc. No. MD-2000 Rev. H