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CAT24FC16_05 Datasheet, PDF (4/11 Pages) Catalyst Semiconductor – 16-kb I2C Serial EEPROM
CAT24FC16
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The CAT24FC16 supports the I2C Bus data transmission SCL: Serial Clock
protocol. This Inter-Integrated Circuit Bus protocol defines The CAT24FC16 serial clock input pin is used to clock all
any device that sends data to the bus to be a transmitter data transfers into or out of the device. This is an input
and any device receiving data to be a receiver. Data pin.
transfer is controlled by the Master device which
generates the serial clock and all START and STOP
conditions for bus access. The CAT24FC16 operates as
a Slave device. Both the Master and Slave devices can
SDA: Serial Data/Address
The CAT24FC16 bidirectional serial data/address pin is
used to transfer data into and out of the device. The SDA
operate as either transmitter or receiver, but the Master
art device controls which mode is activated.
pin is an open drain output and can be wire-ORed with
other open drain or open collector outputs.
WP: Write Protect
This input, when tied to GND, allows write operations to
the entire memory. For CAT24FC16 when this pin is tied
to VCC, the entire array of memory is write protected.
When left floating, memory is unprotected.
P Figure 1. Bus Timing tF
d SCL
tSU:STA
e SDA IN
tinu SDA OUT
tHIGH
tR
tLOW
tLOW
tHD:DAT
tHD:STA
tSU:DAT
tAA
tDH
tSU:STO
tBUF
Figure 2. Write Cycle Timing
n SCL
Disco SDA
8TH BIT
BYTE n
ACK
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
Figure 3. Start/Stop Timing
SDA
SCL
START BIT
Doc. No. 1054, Rev. I
4
STOP BIT